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PDF STAC9460 Data sheet ( Hoja de datos )
| Número de pieza | STAC9460 | |
| Descripción | (STAC9460 / STAC9462) Two and Six-Channel Audio Codec | |
| Fabricantes | ETC | |
| Logotipo |  |
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Integrating Mixed-Signal Solutions
PRELIMINARY DATA SHEET
STAC9460/62
Two and Six-Channel, 24-Bit, 192 kHz
Audio Codec
PRELIMINARY INFORMATION 8/24/01
2-9460-D1-1-0-0801
Copyright © 2001 SigmaTel, Inc. All rights reserved.
All contents of this document are protected by copyright law and may not be reproduced without the express written consent of SigmaTel, Inc.
I2C is a registered trademark of Philips Semiconductor and requires a license for use of the I2C bus interface.
SigmaTel, the SigmaTel logo, and combinations thereof are trademarks of SigmaTel, Inc. Other product names used in this publication are
for identification purposes only and may be trademarks or registered trademarks of their respective companies. The contents of this docu-
ment are provided in connection with SigmaTel, Inc. products. SigmaTel, Inc. has made best efforts to ensure that the information contained
herein is accurate and reliable. However, SigmaTel, Inc. makes no warranties, express or implied, as to the accuracy or completeness of
the contents of this publication and is providing this publication "AS IS". SigmaTel, Inc. reserves the right to make changes to specifications
and product descriptions at any time without notice, and to discontinue or make changes to its products at any time without notice. SigmaTel,
Inc. does not assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential, or incidential damages.
1 page  
PRELIMINARY INFORMATION 8/24/01
STAC9460/62
Two and Six-Channel, 24-Bit, 192 kHz Audio Codec
2.2. Ordering Information
PART NUMBER
STAC9460S
STAC9462S
CHANNELS
6 DAC; 2 ADC
2 DAC; 2 ADC
PACKAGE
28-pin SSOP
28-pin SSOP
TEMPERATURE RANGE
0 oC to +70 ºC
0 oC to +70 ºC
SUPPLY RANGE
AVdd = 5V, DVdd = 3.3V or 5V
AVdd = 5V, DVdd = 3.3V or 5V
STEECBAC9460B (Evaluation Board): please send email request to [email protected]
Note: SigmaTel reserves the right to change specifications without notice.
2.3. Block Diagram
CS SCLK SDATA
RESET
MIC_L
MIC_R
DIFF_L
DIFF_GND
DIFF_R
SDI1
SDI2
SDI3
D_SCLK
D_LRCLK
SDATA_OUT
I2C® Port
VOLUME
VOLUME
MUX
ADC
ADC
DSP
I2S
Port
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME
VOLUME
DAC
DAC
DAC
DAC
DAC
DAC
DAC_LF
DAC_RF
DAC_LR
DAC_RR
DAC_CTR
DAC_BASS
MCLK
CAP DVdd DVss
VREF
Figure 1. STAC9460 Block Diagram
AVdd AVss
2.4. Related Materials
• Product Brief
• Evaluation Boards
• Reference Designs
2.5.
Additional Support
Additional product and company information can be obtained by going to the
SigmaTel website at: www.sigmatel.com
2-9460-D1-1-0-0801
5
5 Page 
PRELIMINARY INFORMATION 8/24/01
STAC9460/62
Two and Six-Channel, 24-Bit, 192 kHz Audio Codec
6.2. Single Line Format
LRCK
SCLK
Left Channel
Right Channel
SDIN 1/2/3
SDATA_OUT
M
S -1
B
L
+1 S
B
M
S -1
B
LM
+1 S S -1
BB
L
+1 S
B
Front
Rear
Center
M
S -1
B
LM
+1 S S -1
BB
LM
+1 S S -1
BB
Front
Rear
Figure 7. Single Line 20 Bit Data Mode Timing Diagram
L
+1 S
B
Bass
Bits/Sample
20
SCLK Rate
128 Fs
Notes
6 inputs, 2 outputs, BRM only
Table 2. Single Line 20 Bit Data Mode, Data Valid on Rising Edge of SCLK
The Single line data mode for the STAC9460 allows data all six channels to be input to the
chip on a single SDATA_IN line, SD1 (Pin 15) and output to all six analog outs (Pins 23-
28). The ADC data will be valid during the first 20 SCLK cycles following a D_LRCLK tran-
sition.
6.3.
I2C-Bus Interface
The I2C-Bus of the STAC9460 operates in compliance with the I2C-Bus Interface Specifi-
cation from Philips Semiconductor. The I2C-Bus for the STAC9460 does include an Auto-
Increment feature not identified by the Phillips specification. For Example, a typical write
would have the following format: START....Chip Address (8 bits)....Register Address(8
bits)....Data(Register Address 8 bits)....Data (Register Address +1 8 bits)....Data (Register
Address +2 8 bits)....STOP. The addresses will increment through the end of the address
space or until a "STOP" condition (as per I2C spec) is received by the part. For detailed
information relating to the I2C, please reference the I2C-Bus Interface Specification from
Philips Semiconductor. Additional information for the Address Registers can be found in
section 7.1.12
Stop Start
Repeated
Start
Stop
SDA
tbuf
thdst
thigh
thdst tf tsusp
SCL
tlow thdd
tsud tsust
Figure 8. I2C Timing Diagram
tr
2-9460-D1-1-0-0801
11
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet STAC9460.PDF ] | |
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