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PDF STAC9766 Data sheet ( Hoja de datos )

Número de pieza STAC9766
Descripción (STAC9766 / STAC9767) TWO-CHANNEL AC97 2.3 CODECS
Fabricantes IDT 
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DATASHEET
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH
STEREO MICROPHONE AND MIC/JACK SENSING
STAC9766/9767
FEATURES
RELATED MATERIALS
• This datasheet is for Rev. CC1 Parts and Beyond
• High Performance Σ∆ Technology
• AC’97 Rev 2.3 Complaint
• 20-bit Full Duplex Stereo ADC & DACs
• Independent Sample Rates for ADC & DACs
• 5-Wire AC-Link Protocol Compliance
• 20-bit SPDIF Output
• Full Stereo Microphone Pre-Amp
• Internal Jack Sensing on Headphone & Line_Out
• Internal Microphone Input Sensing
• Digital PC Beep Option
• Extended AC’97 2.3 Paging Registers
• Digital-ready Status
• General Purpose I/O
• Crystal Elimination Circuit
• Headphone Drive Capability (50 mW)
• 0dB, 10dB, 20dB and 30dB Microphone Boost
Capability
• +3.3 V (STAC9767) and +5 V (STAC9766) Analog
Power Supply Options
• Pin Compatible with STAC9700/21/56
• 100% Compatible with STAC9750/52
• IDT Surround (SS3D) Stereo Enhancement
• Energy Saving Dynamic Power Modes
• Multi-CODEC Option (Intel AC'97 rev 2.3)
• Six Analog Line-level Inputs
• 103dB SNR LINE-LINE
KEY SPECIFICATIONS
• Analog LINE_OUT SNR: 103 dB
• Digital DAC SNR: 95 dB
• Digital ADC SNR: 85 dB
• Full-scale Total Harmonic Distortion: 0.002%
• Crosstalk Between Input Channels: -70 dB
• Spurious Tone Rejection: 100 dB
• Data Sheet
• Reference Designs
DESCRIPTION
IDT's STAC9766/9767 (Revision CC1 and beyond) are
general purpose 20-bit, full duplex, audio CODECs con-
forming to the analog component specification of AC'97
(Audio CODEC 97 Component Specification Rev. 2.3).
The STAC9766/9767incorporates IDT's proprietary Σ∆
technology The AC’97 CODEC is designed to achieve a
DAC SNR in excess of 103dB.
The DACs, ADCs and mixer are integrated with analog I/
Os, which include four analog line-level stereo inputs, two
analog line-level mono inputs, two stereo outputs, and one
mono output channel. The STAC9766/9767 includes digital
input/output capability for support of modern PC systems
with an output that supports the SPDIF format.
The STAC9766/9767 is a standard 2-channel stereo
CODEC. With IDT’s headphone drive capability, head-
phones can be driven with without an external amplifier.
The STAC9766/9767may be used as a secondary
CODEC, with the STAC9700/21/56/08/84/50/52 as the pri-
mary, in a multiple CODEC configuration conforming to the
AC'97 Rev. 2.3 specification. This configuration can pro-
vide the true six-channel, AC-3 playback required for DVD
applications.
The STAC9766/9767 communicates via the five-wire
AC-Link to any digital component of AC'97, providing flexi-
bility in the audio system design.
Packaged in an AC'97 compliant 48-pin TQFP, the
STAC9766/9767 can be placed on a motherboard, daugh-
ter boards, PCI, AMR, CNR, MDC or ACR cards.
The STAC9766/9767provides variable sample rate Digi-
tal-to-Analog (DA) and Analog-to-Digital (AD) conversion,
mixing and analog processing.
Supported audio sample rates include 48KHz, 44.1KHz,
32KHz, 22.05KHz, 16KHz, 11.025KHz, and 8 KHz; addi-
tional rates are supported in the STAC9766/9767 soft
audio drivers. All ADCs and DACs operate at 20-bit resolu-
tion.
The STAC9766/9767 includes full Stereo Microphone
IDT™
1
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
STAC9766/9767
V 7.4 12/06

1 page




STAC9766 pdf
STAC9766/9767
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
PC AUDIO
List of Tables
Table 1. Clock Mode Configuration ............................................................................................................... 14
Table 2. Common Clocks and Sources ......................................................................................................... 15
Table 3. Recommended CODEC ID Strapping ............................................................................................. 23
Table 4. AC-link Output Slots (Transmitted from the Controller) ................................................................... 27
Table 5. The AC-link input slots (transmitted from the CODEC) ................................................................... 28
Table 6. VRA Behavior .................................................................................................................................. 29
Table 7. Output Slot 0 Bit Definitions ............................................................................................................. 32
Table 8. Command Address Port Bit Assignments ........................................................................................ 33
Table 9. Status Address Port Bit Assignments .............................................................................................. 36
Table 10. Status Data Port Bit Assignments .................................................................................................. 36
Table 11. Primary CODEC Addressing: Slot 0 Tag Bits ................................................................................ 38
Table 12. Secondary CODEC Addressing: Slot 0 tag bits ............................................................................. 38
Table 13. AC-link Input Slots To CODEC ...................................................................................................... 39
Table 14. AC-link Input Slots From CODEC .................................................................................................. 39
Table 15. AC-link Output Slots Dedicated To Audio ...................................................................................... 40
Table 16. AC-link Input Slots Dedicated To Audio ......................................................................................... 40
Table 17. Audio Interrupt Slot Definitions ...................................................................................................... 40
Table 18. Digital PC Beep Examples ............................................................................................................. 45
Table 19. Programming Registers ................................................................................................................. 46
Table 20. Extended Audio ID Register Functions .......................................................................................... 60
Table 21. AMAP Compliant ...........................................................................................................................62
Table 22. Hardware Supported Sample Rates .............................................................................................. 63
Table 23. Supported Jack and Mic Sense Functions .................................................................................... 72
Table 24. Reg 68h Default Values ................................................................................................................. 73
Table 25. Gain or Attenuation Examples ....................................................................................................... 73
Table 26. Register 68h/Page 01h Bit Overview ............................................................................................. 74
Table 27. Sensed Bits (Outputs) ................................................................................................................... 75
Table 28. Sensed Bits (Inputs) ...................................................................................................................... 76
Table 29. Low Power Modes ......................................................................................................................... 81
Table 30. CODEC ID Selection .....................................................................................................................83
Table 31. Secondary CODEC Register Access Slot 0 Bit Definitions ...........................................................84
Table 32. Test Mode Activation .....................................................................................................................85
Table 33. ATE Test Mode Operation ............................................................................................................. 85
Table 34. STAC9766/9767 Ordering Information .......................................................................................... 86
Table 35. Digital Connection Signals ............................................................................................................. 88
Table 36. Filtering and Voltage References .................................................................................................. 88
Table 37. Analog Connection Signals ........................................................................................................... 89
Table 38. Power and Ground Signals ............................................................................................................ 90
IDT™
5
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
STAC9766/9767
V 7.4 12/06

5 Page





STAC9766 arduino
STAC9766/9767
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
PC AUDIO
Note:
Parameter
D/A to LINE_OUT
LINE_IN to A/D with High pass filter enabled
Analog Frequency Response (Note 3)
Total Harmonic Distortion: (Note 4)
CD to LINE_OUT
Other to LINE_OUT
D/A to LINE_OUT (full scale)
LINE_IN to A/D with High pass filter enabled
HEADPHONE_OUT
A/D & D/A Digital Filter Pass Band (Note 5)
A/D & D/A Digital Filter Transition Band
A/D & D/A Digital Filter Stop Band
A/D & D/A Digital Filter Stop Band Rejection (Note 6)
DAC Out-of-Band Rejection (Note 7)
Group Delay (48 KHz sample rate)
Any Analog Input to LINE_OUT Crosstalk (10 KHz Signal Frequency)
Any Analog Input to LINE_OUT Crosstalk (1 KHz Signal Frequency)
Spurious Tone Rejection
Attenuation, Gain Step Size
Input Impedance (Note 8)
Input Capacitance
VREFout
Interchannel Gain Mismatch ADC
Interchannel Gain Mismatch DAC
Min Typ Max Unit
- 95 - dB
- 85 - dB
20 - 20,000 Hz
-
-
-
84
74
20
19,200
28,800
100
55
-
70
-
-
-
-
-
-
-
-
95
95
84
-
80
-
-
-
-
-
-
100
100
1.5
50
15
0.5 x AVdd
-
-
-
-
-
-
-
19,200
28,800
-
-
-
1
-
-
-
-
-
-
-
0.5
0.5
dB
dB
dB
dB
dB
Hz
Hz
Hz
dB
dB
ms
dB
dB
dB
dB
K
pF
V
dB
dB
1. With +30 dB Boost on, 1.0 Vrms with Boost off
2. Ratio of Full Scale signal to idle channel noise output is measured “A weighted” over a 20 Hz to a 20 KHz bandwidth.
(AES17-1991 Idle Channel Noise or EIAJ CP-307 Signal-to-noise Ratio).
3. ± 1dB limits for Line Output & 0dB gain
4. 20 KHz BW, 48 KHz Sample Frequency
5. ± 0.25dB limits
6. Stop Band rejection determines filter requirements. Out-of-Band rejection determines audible noise.
7. The integrated Out-of-Band noise generated by the DAC process, during normal PCM audio playback, over a bandwidth
28.8 to 100 KHz, with respect to a 1 Vrms DAC output.
8. For all inputs except PC BEEP.
2.1.6. STAC9767 Analog Performance Characteristics
(Tambient = 2 5 º C , A V d d = 3 . 3 V ± 5 % , D V d d = 3 . 3 V ± 5 % , A V s s = D V s s = 0 V ; 1 K H z i n p u t s i n e
wave; Sample Frequency=48KHz; 0dB=1Vrms, 10KΩ / 50 pFload, TestbenchCharacterization
BW: 20Hz–20KHz, 0dB settings on all gain stages)
Full Scale Input Voltage:
All Analog Inputs except Mic
Mic Inputs (Note 1)
Full Scale Output:
Line Output
Parameter
Min Typ Max Unit
- 1.0 - Vrms
- 0.03 - Vrms
- 0.5 - Vrms
IDT™
11
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
STAC9766/9767
V 7.4 12/06

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