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부품번호 | MX10F201FC 기능 |
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기능 | High-Performance and Low Power Microcontroller designed | ||
제조업체 | Macronix International | ||
로고 | |||
전체 30 페이지수
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MX10F201FC
FEATURES OF MX10F201FC (80C51 with MTP memory and LCD)
- 80C51 CPU core
- Two standard 16-bit Timers
- 4.5 ~ 5.5V voltage range
- On-chip Watch Dog Timer
- 2 to 16MHz clock frequency
- Two channel PWM outputs
- 16K bytes MTP memory for code memory
- UART
- 512 bytes internal data RAM
- 8 interrupt sources
- Low power consumption
- 100 pin PQFP package
- Up to 16 digits LCD driver/controller
- Single clock or dual clock
- Four 8 bit general purpose I/O ports
- EMI compatibility
Features list
- 80C51 CPU core
- 4.5 ~ 5.5V operation voltage range
- 2 to 16MHz clock frequency
- 16K bytes MTP memory for code memory
- More than 100 times program/erase cycles
- More than 10 years data retention
- 512 bytes internal data RAM
- Low operation current
- Power saving modes
- User friendly power control for active mode current
- Idle mode
- Sleep mode
- Power down mode, can be wake up by external interrupts or RESET
- LCD driver/controller
- Max. 16-digits display at 1/4 duty LCD
- 1:1(static), 1:2, 1:3 or 1:4 selectable LCD multiplexing rate
- 4 backplane driver, 32 segment driver
- LCD directly drive capability with display memory
- VLCD to control LCD driving voltage, (VLCD-VSS)
- 4x8 general purpose I/O ports
- Provide software I2C capability
- Two standard 16-bit Timers (Timer 0,1)
- On-chip Watch Dog Timer (WDT)
- Two channel PWM outputs
- UART
- Up to 8 interrupt sources and 8 interrupt vectors
- 4 external sources
- 4 internal sources(Timer0,Timer1,watch Timer and UART)
- 100 pin PQFP package
- Single clock or dual clock
- single clock mode : 2~16MHz system clock for CPU,Timer0/1,WDT,UART and LCD
- dual clock mode : 2~16MHz system clock for CPU,Timer0/1,WDT,UART; while 32.768KHz sub-system
clock for LCD and watch timer.
- system clock is either crystal or RC activated
- EMC(Electro-Magnetic Compatibility) improved
P/N:PM0730
REV. 0.1, FEB. 14, 2003
1
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MX10F201FC
33
33 3 3
T0 T1 INT0/1/2/3
VPP VDD
VLCD
VSS PWM0 PWM1 3 3
TD RD
XTAL1
XTAL2
RESET
T0/T1
Two 16-bit
Counter
CPU
Program
Memory
16KB
Data
Watch
Memory
Dog
512x8 RAM Timer
PWM
Serial
Port
P/N:PM0730
8-bit internal Bus
Parallel I/O
Ports
LCD Unit
88
88
P0 P1 P2 P3
S00-S31 BP3 BP2 BP1 BP0
3 Alternative Function of Port3
Fig.2 Block Diagram
LCON LCD Freq LCD Duty BIAS ENLCD
Ext.CLK Div ider
LCD_CL K
Internal Bus
8
LCD Segment
Display Register
BP0_SEG[31:0]
BP3_SEG[31:0]
Timing/Duty
Control,
Voltage
Selector
Backplane Gen.
Segment Gen.
VLCD
VSS
LCD
BIAS
Gen.
4 BP_Output [1:0]
32 Seg_Output [1:0]
BP Driver
4
Seg. Driver
32
SEG31 SEG30….SEG0
BP0
BP1 LCD Panel
BP2
BP3
Fig.3 LCD Driver Block Diagram
4
REV. 0.1, FEB. 14, 2003
4페이지 www.DataSheet4U.com
Table. 3 SFR Registers Map
Symbol
P0
SP
DPL
DPH
PCON
TCON
TMOD
TL0
TL1
TH0
TH1
P1
SCON
SBUF
P2
IE
P3
IP
LCON
LCD0
LCD1
LCD2
LCD3
LCD4
INTCON
LCD5
LCD6
LCD7
LCD8
LCD9
LCDA
LCDB
PSW
LCDC
LCDD
LCDE
LCDF
ACC
WTL
WTH
IEN1
EBTCON
B
PCON1
IP1
PWM0
PWM1
PWMP
T3 (WDT)
Direct Address(ex)
80H
81
82
83
87
88
89
8A
8B
8C
8D
90
98
99
A0
A8
B0
B8
BA
BB
BC
BD
BE
BF
C0
C1
C2
C3
C4
C5
C6
C7
D0
D1
D2
D3
D4
E0
E3
E4
E8
EB
F0
F1
F8
FC
FD
FE
FF
P/N:PM0730
Reset Value
1111,1111
0000,0111
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
1111,1111
0000,0000
xxxx,xxxx
1111,1111
0000,0000
1111,1111
x000,0000
x001,1100
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
0000,0000
xx00,0000
xxxx,xx00
xxxx,001x
0000,0000
x000,0100
xxxx,xx00
0000,0000
0000,0000
0000,0000
1111,1111
7
MX10F201FC
REV. 0.1, FEB. 14, 2003
7페이지 | |||
구 성 | 총 30 페이지수 | ||
다운로드 | [ MX10F201FC.PDF 데이터시트 ] |
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부품번호 | 상세설명 및 기능 | 제조사 |
MX10F201FC | High-Performance and Low Power Microcontroller designed | Macronix International |
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