PDF FM25040A Data sheet ( Hoja de datos )

Número de pieza	FM25040A
Descripción	4Kb FRAM Serial Memory
Fabricantes	Ramtron International
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No Preview Available ! wwwwww.Da.DtaSahteaeSt4Uh.ecoemt4U.com FM25040A 4Kb FRAM Serial Memory Features 4K bit Ferroelectric Nonvolatile RAM • Organized as 512 x 8 bits • High Endurance 1 Trillion (1012) Read/Writes • 45 year Data Retention • NoDelay™ Writes • Advanced High-Reliability Ferroelectric Process Very Fast Serial Peripheral Interface - SPI • Up to 20 MHz maximum Bus Frequency • Direct hardware replacement for EEPROM • SPI Mode 0 & 3 (CPOL, CPHA=0,0 & 1,1) Description The FM25040A is a 4-kilobit nonvolatile memory employing an advanced ferroelectric process. A ferroelectric random access memory or FRAM is nonvolatile but operates in other respects as a RAM. It provides reliable data retention for 45 years while eliminating the complexities, overhead, and system level reliability problems caused by EEPROM and other nonvolatile memories. Unlike serial EEPROMs, the FM25040A performs write operations at bus speed. No write delays are incurred. Data is written to the memory array in the cycle after it has been successfully transferred to the device. The next bus cycle may commence immediately without the need for data polling. In addition the product offers substantial write endurance compared with other nonvolatile memories. The FM25040A is capable of supporting up to 1012 read/write cycles -- far more than most systems will require from a serial memory. These capabilities make the FM25040A ideal for nonvolatile memory applications requiring frequent or rapid writes. Examples range from data collection, where the number of write cycles may be critical, to demanding industrial controls where the long write time of EEPROM can cause data loss. The FM25040A provides substantial benefits to users of serial EEPROM, in a hardware drop-in replacement. The FM25040A uses the high-speed SPI bus which enhances the high-speed write capability of FRAM technology. Device specifications are guaranteed over an industrial temperature range of -40°C to +85°C. This product conforms to specifications per the terms of the Ramtron standard warranty. The product has completed Ramtron’s internal qualification testing and has reached production status. Rev. 3.0 May 2006 Sophisticated Write Protection Scheme • Hardware Protection • Software Protection Low Power Consumption • 10 µA Standby Current Industry Standard Configuration • Industrial Temperature -40° C to +85° C • 8-pin SOIC (-S) • “Green” 8-pin SOIC (-G) Pin Configuration CS SO WP VSS 1 2 3 4 8 VDD 7 HOLD 6 SCK 5 SI Pin Names /CS /WP /HOLD SCK SI SO VDD VSS Function Chip Select Write Protect Hold Serial Clock Serial Data Input Serial Data Output Supply Voltage 5V Ground Ordering Information FM25040A-S 8-pin SOIC FM25040A-G “Green” 8-pin SOIC Ramtron International Corporation 1850 Ramtron Drive, Colorado Springs, CO 80921 (800) 545-FRAM, (719) 481-7000 www.ramtron.com Page 1 of 13 1 page wwwwww.Da.DtaSahteaeSt4Uh.ecoemt4U.com Data Transfer All data transfers to and from the FM25040A occur in 8-bit groups. They are synchronized to the clock signal (SCK) and they transfer most significant bit (MSB) first. The serial input data is clocked in on the rising edge of SCK. The serial data output is driven from the falling edge of SCK. Command Structure There are six commands called op-codes that can be issued by the bus master to the FM25040A. They are listed in the table below. These op-codes control the functions performed by the memory. They can be divided into three categories. First, there are commands that have no subsequent data transfer. They perform a single function, such as, enabling a write operation. Second are commands followed by one byte, either in or out. They operate on the status register. Third are commands for memory transactions followed by address and one or more bytes of data. Table 1. Op-code Commands Name Description WREN Set Write Enable Latch WRDI Write Disable RDSR Read Status Register WRSR Write Status Register READ Read Memory Data WRITE Write Memory Data Op-code 0000_0110b 0000_0100b 0000_0101b 0000_0001b 0000_A011b 0000_A010b FM25040A WREN - Set Write Enable Latch The FM25040A will power up with writes disabled. The WREN command must be issued prior to any write operation. Sending the WREN op-code will allow the user to issue subsequent op-codes for write operations. These include writing the status register and writing the memory. Sending the WREN op-code causes the internal Write Enable Latch to be set. A flag bit in the status register, called WEL, indicates the state of the latch. WEL=1 indicates that writes are permitted. A write to the status register has no effect on the WEL bit. Completing any write operation will automatically clear the write-enable latch and prevent further writes without another WREN command. Figure 5 below illustrates the WREN command bus configuration. WRDI - Write Disable The WRDI command disables all write activity by clearing the Write Enable Latch. The user can verify that writes are disabled by reading the WEL bit in the status register and verifying that WEL=0. Figure 6 illustrates the WRDI command bus configuration. Figure 5. WREN Bus Configuration Rev. 3.0 May 2006 Figure 6. WRDI Bus Configuration Page 5 of 13 5 Page wwwwww.Da.DtaSahteaeSt4Uh.ecoemt4U.com Serial Data Bus Timing /Hold Timing FM25040A Data Retention (VDD = 4.5V to 5.5V, +85°) Parameter Data Retention Min Units Notes 45 Years Rev. 3.0 May 2006 Page 11 of 13 11 Page

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