|
|
PDF MK2302S-01 Data sheet ( Hoja de datos )
| Número de pieza | MK2302S-01 | |
| Descripción | Multiplier and Zero Delay Buffer | |
| Fabricantes | ICS | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de MK2302S-01 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
MK2302S-01
Multiplier and Zero Delay Buffer
Description
The MK2302S-01is a high performance Zero Delay
Buffer (ZDB) which integrates ICS’ proprietary
analog/digital Phase Locked Loop (PLL) techniques.
The chip is part of ICS’ ClockBlocksTM family and was
designed as a performance upgrade to meet today’s
higher speed and lower voltage requirements. The zero
delay feature means that the rising edge of the input
clock aligns with the rising edges of both output clocks,
giving the appearance of no delay through the device.
There are two outputs on the chip, one being a
low-skew divide by two of the other output.
The MK2302S-01 is ideal for synchronizing outputs in a
large variety of systems, from personal computers to
data communications to graphics/video. By allowing
off-chip feedback paths, the device can eliminate the
delay through other devices.
Features
• 8 pin SOIC package
• Low input to output skew of 250ps max
• Absolute jitter ± 500ps
• Propagation Delay ± 350ps
• Ability to choose between different multipliers from
0.5X to 16X
• Output clock frequency up to 133 MHz at 3.3V
• Can recover degraded input clock duty cycle
• Output clock duty cycle of 45/55
• Full CMOS clock swings with 25mA drive capability
at TTL levels
• Advanced, low power CMOS process
• Operating voltage of 3.3V or 5V
• Industrial temperature version available
Block Diagram
IC L K
S1:0
F B IN
d iv id e
by N
Phase
D etector,
Charge
Pum p,
and Loop
F ilte r
VCO
/2
CLK1
CLK2
External feedback can com e from C LK 1 or C LK2 (see table on page 2)
MDS 2302S-01 B
1
Revision 070803
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
1 page  
www.DataSheet4U.com
MK2302S-01
Multiplier and Zero Delay Buffer
AC Electrical Characteristics
VDD = 3.3V or 5V ±5%, Ambient Temperature 0 to +70° C or -40°C to 85°C
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Input Frequency, ICLK
FBIN from CLK/2
See table on page 2
Output Clock Frequency
CLK1
10 168 MHz
Output to Output Skew
100 175 ps
Input to Output Jitter
40 - 150 MHz
200 ps
Input Skew,
ICLK to FBIN,
-300
CLK>30MHz, Note 1
300 ps
ICLK to FBIN,
-600
CLK<30MHz, Note 1
600 ps
Output Clock Rise Time
0.8 to 2.0V, Note 2
0.8 1 ns
Output Clock Fall Time
2.0 to 0.8V, Note 2
0.8 1 ns
Output Clock Duty Cycle
at VDD/2
40 49 - 51 60
%
Note 1: Assumes clocks with same rise time, measured from rising edges at VDD/2
Note 2: Measured with 27W terminating resistor and 15pF loads
Thermal Characteristics
Parameter
Symbol Conditions
Thermal Resistance Junction to
Ambient
qJA Still air
qJA 1 m/s air flow
qJA 3 m/s air flow
Thermal Resistance Junction to Case qJC
Min.
Typ.
150
140
120
40
Max.
Units
°C/W
°C/W
°C/W
°C/W
MDS 2302S-01 B
5
Revision 070803
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ● www.icst.com
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet MK2302S-01.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MK2302S-01 | Multiplier and Zero Delay Buffer | ICS |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |