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N16T1618A1A 데이터시트 PDF




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부품번호 N16T1618A1A 기능
기능 16M Yltra Low Power CMOS PSRAM
제조업체 NanoAmp Solutions
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N16T1618A1A 데이터시트, 핀배열, 회로
www.DataSheet4U.com
NanoAmp Solutions, Inc.
1982 Zanker Road, San Jose, CA 95112
ph: 408-573-8878, FAX: 408-573-8877
www.nanoamp.com
N16T1618C2(D1/A1)A
Advance Information
16Mb Ultra-Low Power Asynchronous CMOS PSRAM
1M x 16 bit
Overview
Features
The N16T1618C2(D1/A1)A is an integrated
memory device containing a 16 Mbit Pseudo Static
Random Access Memory using a self-refresh
DRAM array organized as 1,048,576 words by 16
bits. It is designed to be compatible in operation
and interface to standard 6T SRAMS. The device
is designed for low standby and operating current
and includes a power-down feature to
automatically enter standby mode. The device is
available in a 2 CE (chip enable) version and two
ZZ (deep sleep) versions. The ZZ version includes
several power saving modes: a deep sleep mode
where data is not retained in the array and partial
array refresh mode where data is retained in a
portion of the array. Both these modes reduce
standby current drain. The VFBGA package has
separate power rails, VccQ and VssQ for the I/O to
be run from a separate power supply from the
device core.
Product Family
• Dual voltage for Optimum Performance
VCCQ and VSSQ for separate I/O power rails
Vcc - 1.65V to 2.2 V
Vccq - 1.65V to 3.6V
• Fast Cycle Times
TACC < 85 nS
• Very low standby current
ISB < 40µA @ 1.8V
• Very low operating current
Icc < 25mA
• Memory expansion with CE and OE
• Automatic power down mode
• 48-Pin VFBGA, Wafers Available
Part Number
Feature
Package Operating
Power
Type Temperature Supply
Speed
Standby Operating
Current (ISB), Current
Max (Icc), Max
N16T1618C2AZ
N16T1618D1AZ
N16T1618A1AZ
2 CE
Deep Sleep Disabled 48 - BGA
Deep Sleep Active
Pin Configuration
123456
A LB OE
A0
A1
A2
CE2/
ZZ
B I/O8 UB A3 A4 CE1 I/O0
C I/O9 I/O10 A5 A6 I/O1 I/O2
D VSSQ I/O11 A17 A7 I/O3 VCC
E VCCQ I/O12 DNU A16 I/O4 VSS
F I/O14 I/O13 A14 A15 I/O5 I/O6
G I/O15 A19 A12 A13 WE I/O7
H A18 A8
A9 A10 A11 NC
48 Pin BGA (top)
6 x 8 mm
-30oC to +85oC 1.65V - 2.2V 85ns @ 1.65V 40 µA @ 1.8V 3 mA @ 1MHz
Pin Descriptions
Pin Name
A0-A19
WE
CE1
CE2
ZZ
OE
LB
UB
I/O0-I/O15
VCC
VSS
VCCQ
VSSQ
DNU
Pin Function
Address Inputs
Write Enable Input
Chip Enable Input
Chip Enable Input (only for CE2
device)
Deep Sleep Input (only for A1 or D1
deep sleep device)
Output Enable Input
Lower Byte Enable Input
Upper Byte Enable Input
Data Inputs/Outputs
Power
Ground
Power I/O pin only
Ground I/O pin only
Do Not Use (or connect to VSS)
Stock No. 23183 - 04 4/03
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
1




N16T1618A1A pdf, 반도체, 판매, 대치품
www.DataSheet4U.com
NanoAmp Solutions, Inc.
Timing Test Conditions
Item
Input Pulse Level
Input Rise and Fall Time
Input Timing Reference Levels
Output Timing Reference Levels
Operating Temperature
N16T1618C2(D1/A1)A
Advance Information
0.1VCC to 0.9 VCC
5ns
0.5 VCC
0.5 VCCQ
-30 oC to +85 oC
Output Load Circuit
I/O
14.5K
VCCQ
14.5K
50 pF
Output Load
Stock No. 23183 - 04 4/03
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
4

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N16T1618A1A 전자부품, 판매, 대치품
www.DataSheet4U.com
NanoAmp Solutions, Inc.
N16T1618C2(D1/A1)A
Advance Information
Timing Waveform of Write Cycle (WE control)
tWC
Address
tSK
tAW
CE1
CE2
tSK
tCW
tWR
tSK tLBW, tUBW
LB, UB
tAS tWP
WE
tDW tDH
Data In
High-Z
tWHZ
Data Valid
tOW
Data Out
High-Z
Timing Waveform of Write Cycle (CE1 Control, CE2 = High)
tWC
Address
CE1
LB, UB
tAW
tCW
tAS
tLBW, tUBW
tWP
tWR
WE
tDW tDH
Data In
Data Out
tWHZ
Data Valid
High-Z
Stock No. 23183 - 04 4/03
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
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부품번호상세설명 및 기능제조사
N16T1618A1A

16M Yltra Low Power CMOS PSRAM

NanoAmp Solutions
NanoAmp Solutions

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