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SW06 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 SW06은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 SW06 자료 제공

부품번호 SW06 기능
기능 Quad SPST JFET Analog Switch
제조업체 Analog Devices
로고 Analog Devices 로고


SW06 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




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SW06 데이터시트, 핀배열, 회로
www.DataSheet4U.com
a
FEATURES
Two Normally Open and Two Normally Closed SPST
Switches with Disable
Switches Can Be Easily Configured as a Dual SPDT or
a DPDT
Highly Resistant to Static Discharge Destruction
Higher Resistance to Radiation than Analog Switches
Designed with MOS Devices
Guaranteed RON Matching: 10% max
Guaranteed Switching Speeds
TON = 500 ns max
TOFF = 400 ns max
Guaranteed Break-Before-Make Switching
Low “ON” Resistance: 80 max
Low RON Variation from Analog Input Voltage: 5%
Low Total Harmonic Distortion: 0.01%
Low Leakage Currents at High Temperature
TA = +125؇C: 100 nA max
TA = +85؇C: 30 nA max
Digital Inputs TTL/CMOS Compatible and Independent
of V+
Improved Specifications and Pin Compatible to
LF-11333/13333
Dual or Single Power Supply Operation
Available in Die Form
GENERAL DESCRIPTION
The SW06 is a four channel single-pole, single-throw analog
switch that employs both bipolar and ion-implanted FET
devices. The SW06 FET switches use bipolar digital logic inputs
which are more resistant to static electricity than CMOS devices.
Ruggedness and reliability are inherent in the SW06 design and
construction technology.
Increased reliability is complemented by excellent electrical
specifications. Potential error sources are reduced by minimizing
“ON” resistance and controlling leakage currents at high tem-
peratures. The switching FET exhibits minimal RON variation
over a 20 V analog signal range and with power supply voltage
changes. Operation from a single positive power supply voltage
is possible. With V+ = 36 V, V– = 0 V, the analog signal range
will extend from ground to +32 V.
PNP logic inputs are TTL and CMOS compatible to allow the
SW06 to upgrade existing designs. The logic “0” and logic “1”
input currents are at microampere levels reducing loading on
CMOS and TTL logic.
Quad SPST JFET
Analog Switch
SW06
FUNCTIONAL BLOCK DIAGRAM
1
IN 1
8
IN 2
9
IN 3
16
IN 4
13
DIS
4
GND
V+
12
LEVEL
SHIFT
5
V–
3
S1
2
D1
6 S2
7
D2
11
S3
10
D3
14
S4
15
D4
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703




SW06 pdf, 반도체, 판매, 대치품
www.DataSheet4U.com
SW06
WAFER TEST LIMITS (@ V+ = +15 V, V– = –15 V, TA = +25؇C, unless otherwise noted)
Parameter
Symbol Conditions
SW06N
Limit
SW06G
Limit Units
“ON” RESISTANCE
RON MATCH BETWEEN SWITCHES
RON VS. VA
POSITIVE SUPPLY CURRENT
RON
RON Match
RON
I+
–10 V VA 10 V, IS 1 mA
VA = 0 V, IS 100 µA
–10 V VA 10 V, IS 1 mA
Note 1
80
15
10
6.0
100 max
20 % max
20 % max
9.0 mA max
NEGATIVE SUPPLY CURRENT
I–
Note 1
5.0 7.0 mA max
GROUND CURRENT
IG Note 1
4.0 4.0 mA max
ANALOG VOLTAGE RANGE
VA IS = 1 mA
± 10.0
± 10.0 V min
LOGIC “1” INPUT VOLTAGE
VINH
Note 2
2.0 2.0 V min
LOGIC “0” INPUT VOLTAGE
VINL
Note 2
0.8 0.8 V max
LOGIC “0” INPUT CURRENT
LOGIC “1” INPUT CURRENT
IINL 0 V VIN 0.8 V
IINH 2.0 V VIN 15 V3
5.0 5.0 µA max
5 5 µA max
ANALOG CURRENT RANGE
IA VS = ± 10 mV
10 7 mA min
NOTE
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
TYPICAL ELECTRICAL CHARACTERISTICS (@ V+ = +15 V, V– = –15 V, TA = +25؇C, unless otherwise noted)
Parameter
Symbol Conditions
SW06N
Typical
SW06G
Typical Units
“ON” RESISTANCE
RON
–10 V VA 10 V, IS 1 mA
60
60
TURN-ON TIME
tON
340 340 ns
TURN-OFF TIME
tOFF
200 200 ns
DRAIN CURRENT IN
“OFF” CONDITION
“OFF” ISOLATION
CROSSTALK
ID(OFF)
ISO(OFF)
CT
VS = 10 V, VD = –10 V
f = 500 kHz, RL = 680
f = 500 kHz, RL = 680
0.3 0.3 nA
58 58 dB
70 70 dB
NOTES
1Power supply and ground current specified for switch “ON” or “OFF.”
2Guaranteed by RON and leakage tests.
3Current tested at VIN = 2.0 V. This is worst case condition.
–4– REV. A

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SW06 전자부품, 판매, 대치품
www.DataSheet4U.com
SW06
TON/TOFF Switching Response
Switching Time vs. Analog Voltage
Switching Time vs. Temperature
Insertion Loss vs. Frequency
Crosstalk and “OFF” Isolation vs.
Frequency
Total Harmonic Distortion
Power Supply Rejection vs.
Frequency
Overvoltage Characteristics
REV. A
–7–

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