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PDF OV8110 Data sheet ( Hoja de datos )

Número de pieza OV8110
Descripción (OV8110 / OV8610) Advanced Information Preliminary
Fabricantes Omnivision 
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Advanced Information
Preliminary
OV8610/OV8110
OV8610 SINGLE-CHIP CMOS VGA COLOR DIGITAL CAMERA
OV8110 SINGLE-CHIP CMOS VGA B&W DIGITAL CAMERA
Description
The OV8610 (color) and OV8110 (black and white) CMOS
Image sensors are single-chip video/imaging camera devices
designed to provide a high level of functionality in a single,
small-footprint package. The devices incorporate an 800 x
600 image array capable of operating at up to 60 frames per
second. Proprietary sensor technology utilizes advanced
algorithms to cancel Fixed Pattern Noise (FPN), eliminate
smearing, and drastically reduce blooming. All required
camera functions including exposure control, gamma, gain,
white balance, color matrix, color saturation, hue control,
windowing, and more, are programmable through the serial
SCCB interface. The device can be programmed to provide
image output in different 8-bit or 16-bit digital formats.
Features
! 480,000 pixels, 1/3” lens, SVGA/QSVGA format
! Data output formats include ITU-601 and ITU-656
! Choice of progressive scan/interlaced read
! Wide dynamic range, anti-blooming, zero smearing
! Electronic exposure/gain/white balance control
! Image Controls - brightness, contrast, gamma, saturation,
sharpness, windowing, hue, etc.
! Internal & external synchronization
! Line exposure option
! 3.3-Volt operation, low power dissipation
- < 30 mA active power at 30FPS with 10 mA load
- < 10 µA in power-down mode
! Built in Gamma correction (0.45/0.55/1.00)
! SCCB programmable:
- Color saturation, brightness, hue, white
exposure time, gain, etc.
balance,
Product
OV8610
OV8110
Ordering Information
Package
Description
48 LCC
0.560 in2
48 LCC
0.560 in2
COLOR, SVGA,
QSVGA, QCIF
Digital, SCCB
interface
SVGA, QSVGA,
QCIF, Digital,
SCCB interface
Applications
. Cell Phone
. Digital Still Camera
. PC Multimedia
. PDAs
. Machine Vision
Key Specifications
Active Array Element
(SVGA)
(QSVGA)
Pixel Size
Image Area
Max Frames/Sec
Electronics Exposure
Scan Mode
Gamma Correction
Min. Illumination
(3000K)
S/N Ratio
FPN
Dark Current
Dynamic Range
Power Supply
Power Requirements
Package
800x600
(400x300)
6.2µm x 6.2µm
4.96mm x 3.72mm
Up to 120 FPS for QSVGA
Up to 648:1 (for selected FPS)
Progressive or Interlace
0.45/0.55/1.0
OV8610 < 3 lux @ f1.2
OV8110 < 0.8 lux @ f1.2
> 48 dB
(AGC off, Gamma=1)
< 0.03% VPP
< .2 nA/cm2
> 72 dB
3.03.6VDC
< 30mA Active (w/10mA load)
< 10µA Standby
48 pin LCC
AGND
AVDD
PWDN
HVDD
VcCHG
SCCBB
VTO
ADVDD
ADGND
VSYNC/CSYS
FODD/SRAM
HREF/VSFRAM
7
8
9
10
11
12
13
14
15
16
17
18
OV8600/8100
42 CHSYNC/BW
41 Y0/CBAR
40 Y1/PROG
39 Y2/G2X
38 Y3/RGB
37 Y4/CS1
36 Y5/SHARP
35 Y6/CS2
34 Y7/CS0
33 PCLK/PWDB
32 DOVDD
31 DOGND
Figure 1. OV8610/OV8110 Pin Diagram
OmniVision Technologies, Inc. 930 Thompson Place Sunnyvale, CA 94085 U.S.A.
Tel: (408) 733-3030 Fax: (408) 733-3061
Website: http://www.ovt.com
Version 1.3, August 27, 2001
Page 1

1 page




OV8110 pdf
www.DataSheet4U.com
Advanced Information
Preliminary
OV8610/OV8110
OV8610 SINGLE-CHIP CMOS VGA COLOR DIGITAL CAMERA
OV8110 SINGLE-CHIP CMOS VGA B&W DIGITAL CAMERA
Table 5. Timing Characteristics
Symbol
Descriptions
Oscillator and Clock Input
fOSC Frequency (XCLK1)
tr, tf Clock input rise/fall time
Clock input duty cycle
SCCB Timing (400Kbit/s)
tBUF Bus free time between STOP and START
tHD:SAT
SIO-D change after START status
tLOW SIO-D low period
tHIGH
SIO-D high period
tHD:DAT
Data hold time
tSU:DAT
Data setup time
tSU:STP
Setup time for STOP status
Digital Timing
tPCLK
PCLK period (16-bit operation)
tPCLK
PCLK period (8-bit operation)
tr, tf PCLK rise/fall time
tPDD PCLK to data valid
tPHD PCLK to HREF delay
Zoom Video Port AC Parameters
t1 PCLK fall time
t2 PCLK low time
t3 PCLK rise time
t4 PCLK high time
t5 PCLK period
t6 Y/UV/HREF setup time
t7 Y/UV/HREF hold time
t8 VSYNC setup/hold time to HREF
Max
40
5
55
5
5
20
8
8
Typ
20
50
50
50
10
Min
10
45
1.3
0.6
1.3
0.6
0
0.1
0.6
5
4
21
4
21
50
5
20
1
Units
MHz
ns
%
ms
µs
µs
µs
µs
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
OmniVision Technologies, Inc. 930 Thompson Place Sunnyvale, CA 94085 U.S.A.
Tel: (408) 733-3030 Fax: (408) 733-3061
Website: http://www.ovt.com
Version 1.3, August 27, 2001
Page 5

5 Page





OV8110 arduino
www.DataSheet4U.com
Advanced Information
Preliminary
OV8610/OV8110
OV8610 SINGLE-CHIP CMOS VGA COLOR DIGITAL CAMERA
OV8110 SINGLE-CHIP CMOS VGA B&W DIGITAL CAMERA
Table 6. Digital Output Format
Resolution
YUV 4:2:2
RGB
Y/UV swap2
U/V swap
YG
Single-Line RGB
Raw Data
MSB/LSB swap
Pixel Clock
16-bit
8-bit
ITU-656
16-bit
8-bit
ITU-6561
16-bit
8-bit
YUV3
RGB4
16-bit
8-bit
16-bit
8-bit
800 X 600
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
400 X 300
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
200 X 150
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Note:
(“Y” indicates mode/combination is supported by OV8610/OV8110)
1. Output is 8-bit in RGB ITU-656 format. SAV and EAV are inserted at the beginning and ending of
HREF, which synchronize the acquisition of VSYNC and HSYNC. 8-bit data bus configuration (without
VSYNC and CHSYNC) can provide timing and data in this format.
2. Y/UV swap is valid in 8-bit only. Y channel output sequence is Y U Y V ···
3. U/V swap means UV channel output sequence swaps in YUV format, i.e., V U V U ··· for 16 bit and V Y
U Y ··· for 8-bit.
4. U/V swap means neighbor row B R output sequence swap in RGB format. Refer to RGB raw data
output format for further details.
Table 7. 4:2:2 16-bit Format
Data Bus
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
UV7
UV6
UV5
UV4
UV3
UV2
UV1
UV0
Y Frame
UV Frame
Y7 Y7
Y6 Y6
Y5 Y5
Y4 Y4
Y3 Y3
Y2 Y2
Y1 Y1
Y0 Y0
UV7 UV7
UV6 UV6
UV5 UV5
UV4 UV4
UV3 UV3
UV2 UV2
UV1 UV1
UV0 UV0
01
01
Pixel Byte Sequence
Y7 Y7
Y6 Y6
Y5 Y5
Y4 Y4
Y3 Y3
Y2 Y2
Y1 Y1
Y0 Y0
UV7 UV7
UV6 UV6
UV5 UV5
UV4 UV4
UV3 UV3
UV2 UV2
UV1 UV1
UV0 UV0
23
23
Y7 Y7
Y6 Y6
Y5 Y5
Y4 Y4
Y3 Y3
Y2 Y2
Y1 Y1
Y0 Y0
UV7 UV7
UV6 UV6
UV5 UV5
UV4 UV4
UV3 UV3
UV2 UV2
UV1 UV1
UV0 UV0
45
45
OmniVision Technologies, Inc. 930 Thompson Place Sunnyvale, CA 94085 U.S.A.
Tel: (408) 733-3030 Fax: (408) 733-3061
Website: http://www.ovt.com
Version 1.3, August 27, 2001
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