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PDF SVM802BS Data sheet ( Hoja de datos )
| Número de pieza | SVM802BS | |
| Descripción | LCD | |
| Fabricantes | ETC | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SVM802BS (archivo pdf) en la parte inferior de esta página. Total 22 Páginas | ||
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www.DataSheet4U.com
Document No.
Customer:
SHENHUI TECHNOLOGY
Model: SVM802BS COB
.
Address:
Tel:
Fax:
Block513, 4th floor,
Beguiling Industrial Area
Shenzhen, China
0755-25843715
0755-82262915
DSG’D
APP’D
1 page  
www.DataSheet4U.com
Character Matrix Module
SHENHUI Technology Co., Ltd.
Document
Section
Specifications
1. Basic Specifications
No.
Sheet
Rev.
1/1
0
1.1 Display Specifications
A) Display Mode
B) Viewing Angle
C) Display
STN/TN, Positive, Reflective/Transflective
6 O’clock Direction
8 Character X 2 line
1.2 Block Diagram
MPU
COM8
LCD
SEG40
LED BACKLIGHT
COM8
1.3 Pin Connection
1 NO. SYMBOL
FUNCITION
1 Vss Power Supply 0V
2 Vdd Power Supply +5V
3 Vlcd Operating voltage for LCD Drive.
Data/Command selection input.
4 RS
RS= H Data Input.
RS= L Instruction Input
Read/write selection input.
5 R/W
RW = H Read Operation.
RW = L Write Operation.
Read/ Write enable signal.
6E
Active high. When this signal is kept low, the data bus is fetched.
7 14 DB0 DB7 Data bus 0~7
15 NC No connect
16 NC No connect
2
5 Page 
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Character Matrix Module
SHENHUI Technology Co., Ltd.
Document
Section
Specifications
3. Electrical Characteristics
No.
Sheet
Rev.
5/5
0
When 1-line display mode(N = 0), DDRAM address is from "00H" to "4FH". In 2-line display mode (N = 1),
DDRAM address in the 1st line isfrom "00H" to "27H", and DDRAM address in the 2nd line is from "40H" to
"67H".
3.4.9 Read Busy Flag & Address
CODE:
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
L H BF AC6 AC5 AC4 AC3 AC2 AC1 AC0
This instruction shows whether module is in internal operation or not.
If the resultant BF is "1", it means the internal operation is in progress and you have to wait until BF to be
Low, and then the next instruction can be performed. In this instruction you can read also the value of address
counter.
3.4.10 Write Data to RAM
CODE:
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
H L D7 D6 D5 D4 D3 D2 D1 D0
Write binary 8-bit data to DDRAM/CGRAM.
The selection of RAM from DDRAM, and CGRAM, is set by the previous address set instruction: DDRAM
address set, CGRAM address set). RAM set instruction can also determine the AC direction to RAM. After
write operation, the address is automatically increased/decreased by 1, according to the entry mode.
3.4.11 Read Data from RAM
CODE:
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
H H D7 D6 D5 D4 D3 D2 D1 D0
Read binary 8-bit data from DDRAM/CGRAM.
The selection of RAM is set by the previous address set instruction. If the address set instruction of RAM
is not performed before this instruction, the data that is read first is invalid, because the direction of AC is not
determined. If you read RAM data several times without RAM address set instruction before read operation,
you can get correct RAM data from the second, but the first data would be incorrect, because there is no time
margin to transfer RAM data. In case of DDRAM read operation, cursor shift instruction plays the same role
as DDRAM address set instruction; it also transfer RAM data to output data register. After read operation
address counter is automatically increased/decreased by 1 according to the entry mode. After CGRAM read
operation, display shift may not be executed correctly.
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet SVM802BS.PDF ] | |
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