Datasheet.kr   

49LF020A 데이터시트 PDF




SST에서 제조한 전자 부품 49LF020A은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 49LF020A 자료 제공

부품번호 49LF020A 기능
기능 SST49LF020A
제조업체 SST
로고 SST 로고


49LF020A 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




전체 50 페이지수

미리보기를 사용할 수 없습니다

49LF020A 데이터시트, 핀배열, 회로
www.DataSheet4U.com
2 Mbit LPC Flash
SST49LF020A
FEATURES:
SST49LF020A2Mb LPC Flash
Data Sheet
• LPC Interface Flash
– SST49LF020A: 256K x8 (2 Mbit)
• Conforms to Intel LPC Interface Specification 1.0
• Flexible Erase Capability
– Uniform 4 KByte Sectors
– Uniform 16 KByte overlay blocks
– Top Boot Block protection: 16 KByte
– Chip-Erase for PP Mode Only
• Single 3.0-3.6V Read and Write Operations
• Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
• Low Power Consumption
– Active Read Current: 6 mA (typical)
– Standby Current: 10 µA (typical)
• Fast Sector-Erase/Byte-Program Operation
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 70 ms (typical)
– Byte-Program Time: 14 µs (typical)
– Chip Rewrite Time: 4 seconds (typical)
– Single-pulse Program or Erase
– Internal timing generation
• Two Operational Modes
– Low Pin Count (LPC) Interface mode for
in-system operation
– Parallel Programming (PP) Mode for fast production
programming
• LPC Interface Mode
– 5-signal communication interface supporting
byte Read and Write
– 33 MHz clock frequency operation
– WP# and TBL# pins provide hardware write protect
for entire chip and/or top boot block
– Standard SDP Command Set
– Data# Polling and Toggle Bit for End-of-Write
detection
– 5 GPI pins for system design flexibility
– 4 ID pins for multi-chip selection
• Parallel Programming (PP) Mode
– 11-pin multiplexed address and 8-pin data
I/O interface
– Supports fast programming In-System on
programmer equipment
• CMOS and PCI I/O Compatibility
• Packages Available
– 32-lead PLCC
– 32-lead TSOP (8mm x 14mm)
• All non-Pb (lead-free) devices are RoHS compliant
PRODUCT DESCRIPTION
The SST49LF020A flash memory device is designed to
interface with the LPC bus for PC and Internet Appliance
application in compliance with Intel Low Pin Count (LPC)
Interface Specification 1.0. Two interface modes are sup-
ported: LPC mode for in-system operations and Parallel
Programming (PP) mode to interface with programming
equipment.
The SST49LF020A flash memory device is manufactured
with SST’s proprietary, high-performance SuperFlash
Technology. The split-gate cell design and thick-oxide tun-
neling injector attain better reliability and manufacturability
compared with alternate approaches. The SST49LF020A
device significantly improves performance and reliability,
while lowering power consumption. The SST49LF020A
device writes (Program or Erase) with a single 3.0-3.6V
power supply. It uses less energy during Erase and Pro-
gram than alternative flash memory technologies. The total
energy consumed is a function of the applied voltage, cur-
rent and time of application. For any give voltage range, the
SuperFlash technology uses less current to program and
has a shorter erase time; the total energy consumed during
any Erase or Program operation is less than alternative
flash memory technologies. The SST49LF020A product
provides a maximum Byte-Program time of 20 µsec. The
entire memory can be erased and programmed byte-by-
byte typically in 4 seconds when using status detection fea-
tures such as Toggle Bit or Data# Polling to indicate the
completion of Program operation. The SuperFlash technol-
ogy provides fixed Erase and Program time, independent
of the number of Erase/Program cycles that have per-
formed. Therefore the system software or hardware does
not have to be calibrated or correlated to the cumulative
number of Erase cycles as is necessary with alternative
flash memory technologies, whose Erase and Program
time increase with accumulated Erase/Program cycles.
To meet high density, surface mount requirements, the
SST49LF020A device is offered in 32-lead TSOP and 32-
lead PLCC packages. See Figures 2 and 3 for pin assign-
ments and Table 1 for pin descriptions.
©2006 Silicon Storage Technology, Inc.
S71206-08-000
5/06
1
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
Intel is a registered trademark of Intel Corporation.
These specifications are subject to change without notice.




49LF020A pdf, 반도체, 판매, 대치품
www.DataSheet4U.com
2 Mbit LPC Flash
SST49LF020A
Data Sheet
LIST OF FIGURES
FIGURE 1: Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
FIGURE 2: Pin Assignments for 32-lead PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
FIGURE 3: Pin Assignments for 32-lead TSOP (8mm x 14mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
FIGURE 4: Device Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
FIGURE 5: LPC Read Cycle Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
FIGURE 6: LPC Write Cycle Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
FIGURE 7: Program Command Sequence (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
FIGURE 8: Data# Polling Command Sequence (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
FIGURE 9: Toggle Bit Command Sequence (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
FIGURE 10: Sector-Erase Command Sequence (LPC Mode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
FIGURE 11: Block-Erase Command Sequence (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
FIGURE 12: Register Readout Command Sequence (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
FIGURE 13: LCLK Waveform (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
FIGURE 14: Reset Timing Diagram (LPC Mode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
FIGURE 15: Output Timing Parameters (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
FIGURE 16: Input Timing Parameters (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
FIGURE 17: Reset Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
FIGURE 18: Read Cycle Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
FIGURE 19: Write Cycle Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
FIGURE 20: Data# Polling Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
FIGURE 21: Toggle Bit Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
FIGURE 22: Byte-Program Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
FIGURE 23: Sector-Erase Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
FIGURE 24: Block-Erase Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
FIGURE 25: Chip-Erase Timing Diagram (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
FIGURE 26: Software ID Entry and Read (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
FIGURE 27: Software ID Exit (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
FIGURE 28: AC Input/Output Reference Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
FIGURE 29: A Test Load Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
FIGURE 30: Read Flowchart (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
FIGURE 31: Byte-Program Flowchart (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
FIGURE 32: Erase Command Sequences Flowchart (LPC Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
FIGURE 33: Software Product ID Command Sequences Flowchart (LPC Mode) . . . . . . . . . . . . . . . . . . . . 42
FIGURE 34: Byte-Program Command Sequences Flowchart (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . 43
FIGURE 35: Wait Options Flowchart (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
FIGURE 36: Software Product ID Command Sequences Flowchart (PP Mode) . . . . . . . . . . . . . . . . . . . . . 45
FIGURE 37: Erase Command Sequence Flowchart (PP Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
FIGURE 38: 32-lead Plastic Lead Chip Carrier (PLCC) SST Package Code: NH . . . . . . . . . . . . . . . . . . . . 48
FIGURE 39: 32-lead Thin Small Outline Package (TSOP) 8mm x 14mm SST Package Code: WH . . . . . . 49
©2006 Silicon Storage Technology, Inc.
4
S71206-08-000
5/06

4페이지










49LF020A 전자부품, 판매, 대치품
www.DataSheet4U.com
2 Mbit LPC Flash
SST49LF020A
PIN ASSIGNMENTS
Data Sheet
A7(GPI1)
A6 (GPI0)
A5 (WP#)
A4 (TBL#)
A3 (ID3)
A2 (ID2)
A1 (ID1)
A0 (ID0)
DQ0 (LAD0)
4 3 2 1 32 31 30
5 29
6 28
7 27
8 32-lead PLCC 26
9 25
10
Top View
24
11 23
12 22
13 21
14 15 16 17 18 19 20
MODE (MODE)
NC (CE#)
NC
NC
VDD (VDD)
OE# (INIT#)
WE# (LFRAME#)
NC
DQ7 (RES)
( ) Designates LPC Mode
FIGURE 2: Pin Assignments for 32-lead PLCC
1206 32-plcc P1.0
NC
NC
NC
NC (CE#)
MODE (MODE)
A10 (GPI4)
R/C# (LCLK)
VDD (VDD)
NC
RST# (RST#)
A9 (GPI3)
A8 (GPI2)
A7 (GPI1)
A6 (GPI0)
A5 (WP#)
A4 (TBL#)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
( ) Designates LPC Mode
Standard Pinout
Top View
Die Up
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1206 32-tsop P2.0
FIGURE 3: Pin Assignments for 32-lead TSOP (8mm x 14mm)
OE# (INIT#)
WE# (LFRAME#)
VDD (VDD)
DQ7 (RES)
DQ6 (RES)
DQ5 (RES)
DQ4 (RES)
DQ3 (LAD3)
VSS (VSS)
DQ2 (LAD2)
DQ1 (LAD1)
DQ0 (LAD0)
A0 (ID0)
A1 (ID1)
A2 (ID2)
A3 (ID3)
©2006 Silicon Storage Technology, Inc.
7
S71206-08-000
5/06

7페이지


구       성 총 50 페이지수
다운로드[ 49LF020A.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
49LF020A

SST49LF020A

SST
SST

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵