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부품번호 | LVPXA272FC0156 기능 |
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기능 | PXA27x Processor Family | ||
제조업체 | Intel | ||
로고 | |||
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Intel® PXA27x Processor Family
Electrical, Mechanical, and Thermal Specification
Data Sheet
■ High-performance processor:
— Intel XScale® microarchitecture with
Intel® Wireless MMX™ Technology
— 7 Stage pipeline
— 32 KB instruction cache
— 32 KB data cache
— 2 KB “mini” data cache
— Extensive data buffering
■ 256 Kbytes of internal SRAM for high
speed code or data storage preserved
during low-power states
■ High-speed baseband processor interface
(Mobile Scalable Link)
■ Rich serial peripheral set:
— AC’97 audio port
— I2S audio port
— USB Client controller
— USB Host controller
— USB On-The-Go controller
— Three high-speed UARTs (two with
hardware flow control)
— FIR and SIR infrared communications
port
■ Hardware debug features — IEEE JTAG
interface with boundary scan
■ Hardware performance-monitoring
features with on-chip trace buffer
■ Real-time clock
■ Operating-system timers
■ LCD Controller
■ Universal Subscriber Identity Module
interface
■ Low power:
— Wireless Intel Speedstep® Technology
— Less than 500 mW typical internal
dissipation
— Supply voltage may be reduced to
0.85 V
— Four low-power modes
— Dynamic voltage and frequency
management
■ High-performance memory controller:
— Four banks of SDRAM: up to 104 MHz
@ 1.8 V I/O interface
— Six static chip selects
— Support for PCMCIA and Compact
Flash
— Companion chip interface
■ Flexible clocking:
— CPU clock from 104 to 520 MHz
— Flexible memory clock ratios
— Frequency changes
— Functional clock gating
■ Additional peripherals for system
connectivity:
— SD Card / MMC Controller (with SPI
mode support)
— Memory Stick card controller
— Three SSP controllers
— Two I2C controllers
— Four pulse-width modulators (PWMs)
— Keypad interface with both direct and
matrix keys support
— Most peripheral pins double as GPIOs
Order Number 280003-001
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Intel® PXA27x Processor Family
Contents
6.2.2 Hardware Reset Timing.................................................................6-4
6.2.3 Watchdog Reset Timing ................................................................6-5
6.2.4 GPIO Reset Timing .......................................................................6-5
6.2.5 Sleep Mode Timing .......................................................................6-6
6.2.6 Deep-Sleep Mode Timing..............................................................6-7
6.2.7 Standby-Mode Timing .................................................................6-10
6.2.8 Idle-Mode Timing.........................................................................6-10
6.2.9 Frequency-Change Timing..........................................................6-10
6.2.10 Voltage-Change Timing...............................................................6-11
6.3 GPIO Timing Specifications .....................................................................6-11
6.4 Memory and Expansion-Card Timing Specifications................................6-12
6.4.1 Internal SRAM Read/Write Timing Specifications .......................6-12
6.4.2 SDRAM Parameters and Timing Diagrams.................................6-12
6.4.3 ROM Parameters and Timing Diagrams .....................................6-18
6.4.4 Flash Memory Parameters and Timing Diagrams.......................6-23
6.4.5 SRAM Parameters and Timing Diagrams ...................................6-33
6.4.6 Variable-Latency I/O Parameters and Timing Diagrams.............6-36
6.4.7 Expansion-Card Interface Parameters and Timing Diagrams.....6-40
6.5 LCD Timing Specifications .......................................................................6-43
6.6 SSP Timing Specifications .......................................................................6-44
6.7 JTAG Boundary Scan Timing Specifications............................................6-45
Appendix A ................................................................................................................... A-1
Glossary .............................................................................................................Glossary-1
Figures
2-1 Intel® PXA27x Processor Family Block Diagram, Typical System ....................2-2
3-1 14 x 14 mm Intel® PXA27x Processor Family Package, Top View ...................3-1
3-2 14 x 14 mm Intel® PXA27x Processor Family Package, Top View ...................3-2
3-3 14 x 14-mm Intel® PXA27x Processor Family Package, Side View ..................3-2
3-4 Processor Markings, Intel® PXA27x Processor Family .....................................3-4
3-5 Intel® PXA27x Product Information Decoder.....................................................3-4
4-1 1.8V Intel® PXA27x Processor Family Ball Map, Top Left Quarter ...................4-3
4-2 1.8V Intel® PXA27x Processor Family Ball Map, Top Right Quarter.................4-4
4-3 1.8V Intel® PXA27x Processor Family Ball Map, Bottom Left Quarter ..............4-5
4-4 1.8V Intel® PXA27x Processor Family Ball Map, Bottom Right Quarter............4-6
6-1 AC Test Load .....................................................................................................6-2
6-2 Power On Reset Timing .....................................................................................6-3
6-3 Hardware Reset Timing .....................................................................................6-4
6-4 GPIO Reset Timing ............................................................................................6-5
6-5 Sleep Mode Timing ............................................................................................6-7
6-6 Deep-Sleep-Mode Timing ..................................................................................6-8
6-7 SDRAM Timing ................................................................................................6-15
6-8 SDRAM 4-Beat Read/4-Beat Write, Different Banks Timing............................6-16
6-9 SDRAM 4-Beat Write/4-Beat Write, Same Bank-Same Row Timing ...............6-17
6-10SDRAM Fly-by DMA Timing.............................................................................6-18
6-1132-Bit Non-burst ROM, SRAM, or Flash Read Timing .....................................6-20
6-1232-Bit Burst-of-Eight ROM or Flash Read Timing ............................................6-21
iv Electrical, Mechanical, and Thermal Specification
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Introduction
1
1.1
1.1.1
1.1.2
The Intel® PXA27x Processor Family (Intel PXA27x processor family) provides industry-leading
multimedia performance, low-power capabilities, rich peripheral integration and second generation
memory stacking. Designed from the ground up for wireless clients, it incorporates the latest Intel
advances in mobile technology over its predecessor, the Intel® PXA255 processor. The Intel
PXA27x processor family redefines scalability by operating from 104 MHz up to 520 MHz,
providing enough performance for the most demanding mobile applications.
The Intel PXA27x processor family is the first Intel processor to include Intel® Wireless MMX™
technology, enabling high-performance, low-power multimedia acceleration with a general-
purpose instruction set. Intel® Quick Capture technology provides a flexible and powerful camera
interface for capturing digital images and video. While performance is key in the Intel PXA27x
processor family, power consumption is also a critical component. The new capabilities of Wireless
Intel SpeedStep® technology set the standard for low-power consumption.
The Intel PXA27x processor family is available in both discrete and stacked versions in the
following configurations:
• Intel® PXA271 processor (Intel PXA271 processor) with 32 MBytes of Intel StrataFlash®
Memory and 32 MBytes of Low-Power SDRAM
• Intel® PXA272 processor (Intel PXA272 processor) with 64 MBytes of Intel StrataFlash®
Memory
• Intel® PXA273 processor (Intel PXA273 processor) 32 MBytes of Intel StrataFlash®
Memory
About This Document
This document constitutes the electrical, mechanical, and thermal specifications for the Intel
PXA27x processor. It contains a functional overview, mechanical data, package signal locations,
targeted electrical specifications, and functional bus waveforms. For detailed functional
descriptions other than parametric performance, refer to the Intel® PXA27x Processor Family
Developers Manual.
Number Representation
All numbers in this document are base 10 unless designated otherwise. Hexadecimal numbers have
a prefix of 0x, and binary numbers have a prefix of 0b. For example, 107 is represented as 0x6B in
hexadecimal and 0b110_1011 in binary.
Typographical Conventions
All signal and register-bit names appear in uppercase. Active low items are prefixed with a
lowercase “n”.
Bits within a signal name are enclosed in angle brackets:
Electrical, Mechanical, and Thermal Specification
1-1
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DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |