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39SF512 데이터시트 PDF




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39SF512 데이터시트, 핀배열, 회로
www.DataSheet4U.com
512 Kbit (x8) Multi-Purpose Flash
SST39SF512
FEATURES:
SST39SF5125.0V 512Kb (x8) MPF memory
Data Sheet
• Organized as 64K x8
• Single 4.5-5.5V Read and Write Operations
• Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
• Low Power Consumption
(typical values at 14 MHz)
– Active Current: 10 mA (typical)
– Standby Current: 10 µA (typical)
• Sector-Erase Capability
– Uniform 4 KByte sectors
• Fast Read Access Time:
– 70 ns
• Latched Address and Data
• Fast Erase and Byte-Program
– Sector-Erase Time: 7 ms (typical)
– Chip-Erase Time: 15 ms (typical)
– Byte-Program Time: 20 µs (typical)
– Chip Rewrite Time: 2 seconds (typical)
• Automatic Write Timing
– Internal VPP Generation
• End-of-Write Detection
– Toggle Bit
– Data# Polling
• TTL I/O Compatibility
• JEDEC Standard
– Flash EEPROM Pinouts and command sets
• Packages Available
– 32-lead PLCC
– 32-lead TSOP (8mm x 14mm)
– 32-pin PDIP
PRODUCT DESCRIPTION
The SST39SF512 are CMOS Multi-Purpose Flash (MPF)
manufactured with SST’s proprietary, high performance
CMOS SuperFlash technology. The split-gate cell design
and thick-oxide tunneling injector attain better reliability and
manufacturability compared with alternate approaches.
The SST39SF512 devices write (Program or Erase) with a
4.5-5.5V power supply. The SST39SF512 device conforms
to JEDEC standard pinouts for x8 memories.
Featuring high performance Byte-Program, the
SST39SF512 devices provide a maximum Byte-Program
time of 30 µsec. These devices use Toggle Bit or Data#
Polling to indicate the completion of Program operation. To
protect against inadvertent write, they have on-chip hard-
ware and Software Data Protection schemes. Designed,
manufactured, and tested for a wide spectrum of applica-
tions, these devices are offered with a guaranteed typical
endurance of 100,000 cycles. Data retention is rated at
greater than 100 years.
The SST39SF512 devices are suited for applications that
require convenient and economical updating of program,
configuration, or data memory. For all system applications,
they significantly improve performance and reliability, while
lowering power consumption. They inherently use less
energy during erase and program than alternative flash
technologies. The total energy consumed is a function of
©2003 Silicon Storage Technology, Inc.
S71149-05-000
11/03
1
the applied voltage, current, and time of application. Since
for any given voltage range, the SuperFlash technology
uses less current to program and has a shorter erase time,
the total energy consumed during any Erase or Program
operation is less than alternative flash technologies. These
devices also improve flexibility while lowering the cost for
program, data, and configuration storage applications.
The SuperFlash technology provides fixed Erase and Pro-
gram times, independent of the number of Erase/Program
cycles that have occurred. Therefore the system software
or hardware does not have to be modified or de-rated as is
necessary with alternative flash technologies, whose Erase
and Program times increase with accumulated Erase/Pro-
gram cycles.
To meet high density, surface mount requirements, the
SST39SF512 are offered in 32-lead PLCC, 32-lead TSOP,
and a 600 mil, 32-pin PDIP packages. See Figures 1, 2,
and 3 for pin assignments.
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
MPF is a trademark of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.




39SF512 pdf, 반도체, 판매, 대치품
www.DataSheet4U.com
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
X-Decoder
Memory Address
Address Buffers & Latches
CE#
OE#
WE#
Control Logic
512 Kbit Multi-Purpose Flash
SST39SF512
SuperFlash
Memory
Y-Decoder
I/O Buffers and Data Latches
DQ7 - DQ0
1149 B1.1
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
4 3 2 1 32 31 30
5 29
6 28
7 27
8 32-lead PLCC 26
9 25
Top View
10 24
11 23
12 22
13 21
14 15 16 17 18 19 20
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
1149 F02b.6
FIGURE 1: PIN ASSIGNMENTS FOR 32-LEAD PLCC
©2003 Silicon Storage Technology, Inc.
4
S71149-05-000
11/03

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39SF512 전자부품, 판매, 대치품
www.DataSheet4U.com
512 Kbit Multi-Purpose Flash
SST39SF512
Data Sheet
TABLE 4: SOFTWARE COMMAND SEQUENCE
Command
Sequence
Byte-Program
Sector-Erase
Chip-Erase
Software ID Entry4,5
Software ID Exit6
Software ID Exit6
1st Bus
Write Cycle
Addr1 Data
5555H AAH
5555H AAH
5555H AAH
5555H AAH
XXH F0H
5555H AAH
2nd Bus
Write Cycle
Addr1 Data
2AAAH 55H
2AAAH 55H
2AAAH 55H
2AAAH 55H
2AAAH 55H
3rd Bus
Write Cycle
Addr1 Data
5555H A0H
5555H 80H
5555H 80H
5555H 90H
5555H F0H
4th Bus
Write Cycle
Addr1 Data
BA2 Data
5555H AAH
5555H AAH
5th Bus
Write Cycle
Addr1 Data
2AAAH 55H
2AAAH 55H
1. Address format A14-A0 (Hex), Address A15 can be VIL or VIH, but no other value, for the Command sequence.
2. BA = Program Byte address
3. SAX for Sector-Erase; uses AMS-A12 address lines
AMS = Most significant address
AMS = A15 for SST39SF512
4. The device does not remain in Software Product ID mode if powered down.
5. With AMS-A1 = 0; SST Manufacturer’s ID = BFH, is read with A0 = 0,
SST39SF512 Device ID = B4H, is read with A0 = 1
6. Both Software ID Exit operations are equivalent
6th Bus
Write Cycle
Addr1 Data
SAX3 30H
5555H 10H
T4.3 1149
Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum
Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation
of the device at these conditions or conditions greater than those defined in the operational sections of this data
sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.)
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
D. C. Voltage on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VDD+0.5V
Transient Voltage (<20 ns) on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.0V to VDD+2.0V
Voltage on A9 Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 14.0V
Package Power Dissipation Capability (Ta = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0W
Through Hold Lead Soldering Temperature (10 Seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
Surface Mount Lead Soldering Temperature (3 Seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240°C
Output Short Circuit Current1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
1. Outputs shorted for no more than one second. No more than one output shorted at a time.
OPERATING RANGE
Range
Commercial
Industrial
Ambient Temp
0°C to +70°C
-40°C to +85°C
VDD
4.5-5.5V
4.5-5.5V
AC CONDITIONS OF TEST
Input Rise/Fall Time . . . . . . . . . . . . . . 10 ns
Output Load . . . . . . . . . . . . . . . . . . . . . CL = 30 pF for 70 ns
Output Load . . . . . . . . . . . . . . . . . . . . . CL = 100 pF for 90 ns
See Figures 13 and 14
©2003 Silicon Storage Technology, Inc.
7
S71149-05-000
11/03

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부품번호상세설명 및 기능제조사
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