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PDF 93HC46 Data sheet ( Hoja de datos )

Número de pieza 93HC46
Descripción CAT93HC46
Fabricantes Catalyst Semiconductor 
Logotipo Catalyst Semiconductor Logotipo



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CAT93HC46
1K-Bit High Speed Microwire Serial EEPROM
FEATURES
s High speed operation:
– 93HC46: 3MHz
s Low power CMOS technology
s 1.8 to 6.0 volt operation
s Selectable x8 or x16 memory organization
s Self-timed write cycle with auto-clear
s Sequential Read
s Software write protection
s Power-up inadvertent write protection
s 1,000,000 program/erase cycles
s 100 year data retention
s Commercial, industrial and automotive
temperature ranges
DESCRIPTION
The CAT93HC46 is a 1K-bit Serial EEPROM memory
devices which is configured as either registers of 16 bits
(ORG pin at VCC) or 8 bits (ORG pin at GND). Each
register can be written (or read) serially by using the DI
(or DO) pin. The CAT93HC46 is manufactured using
Catalyst’s advanced CMOS EEPROM floating gate
technology. The device is designed to endure 1,000,000
program/erase cycles and has a data retention of 100
years. The CAT93HC46 is available in 8-pin DIP, 8-pin
SOIC or 8-pin TSSOP packages.
PIN CONFIGURATION
DIP Package (P)
CS 1
SK 2
DI 3
DO 4
8 VCC
7 NC
6 ORG
5 GND
SOIC Package (J) SOIC Package (S)
TSSOP Package (U)
NC
VCC
CS
SK
1
2
3
4
8 ORG CS 1
7 GND SK 2
6 DO
DI 3
5 DI
DO 4
8 VCC
7 NC
6 ORG
CS
SK
DI
5 GND DO
1
2
3
4
8
7
6
5
VCC
NC
ORG
GND
PIN FUNCTIONS
Pin Name
Function
CS Chip Select
SK Clock Input
DI Serial Data Input
DO Serial Data Output
VCC
GND
+1.8 to 6.0V Power Supply
Ground
ORG
Memory Organization
NC No Connection
PE* Program Enable
Note: When the ORG pin is connected to VCC, the X16
organization is selected. When it is connected to ground,
the X8 pin is selected. If the ORG pin is left unconnected,
then an internal pullup device will select the X16
organization.
BLOCK DIAGRAM
VCC
GND
ORG
MEMORY ARRAY
ORGANIZATION
DATA
REGISTER
DI
MODE DECODE
CS LOGIC
CLOCK
SK GENERATOR
© 2002 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
ADDRESS
DECODER
OUTPUT
BUFFER
DO
93C46/56/57/66/86 F02
Doc. No. 1008,Rev. C

1 page




93HC46 pdf
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CAT93HC46
DEVICE OPERATION
The CAT93HC46 is a 1024-bit nonvolatile memory
intended for use with industry standard microprocessors.
The CAT93HC46 can be organized as either registers of
16 bits or 8 bits. When organized as X16, seven 9-bit
instructions control the reading, writing and erase
operations of the device. When organized as X8, seven
10-bit instructions control the reading, writing and erase
operations of the device. The CAT93HC46 operates on
a single power supply and will generate on chip, the high
voltage required during any write operation.
Instructions, addresses, and write data are clocked into
the DI pin on the rising edge of the clock (SK). The DO
pin is normally in a high impedance state except when
reading data from the device, or when checking the
ready/busy status after a write operation.
The ready/busy status can be determined after the start
of a write operation by selecting the device (CS high) and
polling the DO pin; DO low indicates that the write
operation is not completed, while DO high indicates that
the device is ready for the next instruction. If necessary,
the DO pin may be placed back into a high impedance
state during chip select by shifting a dummy 1into the
DI pin. The DO pin will enter the high impedance state on
the falling edge of the clock (SK). Placing the DO pin into
the high impedance state is recommended in applications
where the DI pin and the DO pin are to be tied together
to form a common DI/O pin.
Figure 1. Sychronous Data Timing
tSKHI
SK
tDIS
DI VALID
tCSS
CS
DO
tSKLOW
VALID
tDIH
tCSH
tDIS
tPD0,tPD1
tCSMIN
DATA VALID
Figure 2a. Read Instruction Timing
SK
CS
AN AN1
DI
11
0
A0
tCS MIN
STANDBY
HIGH-Z
tPD0
DO 0
tHZ
HIGH-Z
DN DN1
D1 D0
5 Doc. No. 1008, Rev. C

5 Page










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