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PDF UPA1741TP Data sheet ( Hoja de datos )

Número de pieza UPA1741TP
Descripción SWITCHING N-CHANNEL POWER MOSFET
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1741TP
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The µPA1741TP is N-channel MOS FET device that features a
low on-state resistance and excellent switching characteristics, and
designed for high voltage applications such as DC/DC converter.
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FEATURES
High voltage: VDSS = 250 V
Gate voltage rating: ±30 V
Low on-state resistance
RDS(on) = 0.79 MAX. (VGS = 10 V, ID = 2.5 A)
Low input capacitance
Ciss = 340 pF TYP. (VDS = 10 V, VGS = 0 V)
Built-in gate protection diode
Small and surface mount package (Power HSOP8)
PACKAGE DRAWING (Unit: mm)
85
1, 2, 3
; Source
4 ; Gate
5, 6, 7, 8, 9 ; Drain
14
5.2
+0.17
–0.2
0.8 ±0.2
S
6.0 ±0.3
4.4 ±0.15
1.27 TYP.
0.40
+0.10
–0.05
14
0.12 M
0.10 S
ORDERING INFORMATION
PART NUMBER
PACKAGE
2.0 ±0.2
9
4.1 MAX.
µPA1741TP
Power HSOP8
85
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise noted. All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
250 V
Gate to Source Voltage (VDS = 0 V)
VGSS
±30 V
EQUIVALENT CIRCUIT
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) Note1
ID(DC)
ID(pulse)
±5.0
±15
A
A
Drain
Total Power Dissipation (TC = 25°C)
Total Power Dissipation (TA = 25°C)Note2
Channel Temperature
PT1
PT2
Tch
21 W
1W
150 °C
Gate
Body
Diode
Storage Temperature
Single Avalanche Current Note3
Single Avalanche Energy Note3
Repetitive Avalanche Current Note4
Repetitive Pulse Avalanche Energy Note4
Tstg 55 to +150 °C
IAS 5.0 A
EAS 2.5 mJ
IAR 5.0 A
EAR 2.5 mJ
Gate
Protection
Diode
Source
Notes 1. PW 10 µs, Duty Cycle 1%
2. Mounted on glass epoxy board of 1 inch x 1 inch x 0.8 mm
3. Starting Tch = 25°C, VDD = 125 V, RG = 25 , L = 100 µH, VGS = 20 0 V
4. Tch(peak) 150°C, L = 100 µH
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G16373EJ1V0DS00 (1st edition)
Date Published April 2003 NS CP(K)
Printed in Japan
2003

1 page




UPA1741TP pdf
µ PA1741TP
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
2
1.75
VGS = 10 V
Pulsed
1.5
1.25
1
ID = 5.0 A
0.75
0.5
2.5 A
0.25
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0
-50 -25 0
25 50 75 100 125 150
Tch - Channel Temperature - °C
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
1000
C iss
100
C oss
10
VGS = 0 V
f = 1 MHz
1
0.1 1
C rss
10 100 1000
VDS - Drain to Source Voltage - V
SWITCHING CHARACTERISTICS
100
VVDDDD==112255VV
VVGGSS==1100VV
RRGG==00ΩΩ
td(off)
10 td(on)
tr
tf
1
0.1
1 10
ID - Drain Current - A
100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
250 15
ID = 5.0 A
200
VDD = 200 V
125 V
62.5 V
150
12
9
100
50
VGS
VDS
6
3
00
0 1 2 3 4 5 6 7 8 9 10 11 12
QG - Gate Charge - nC
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
100
Pulsed
VGS = 0 V
10
1
0.1
0.01
0
0.25 0.5 0.75 1 1.25 1.5
VF(S-D) - Source to Drain Voltage - V
1000
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
di/dt = 100 A/µs
VGS = 0 V
100
10
1
0.1
1 10
IF - Diode Forward Current - A
100
Data Sheet G16373EJ1V0DS
5

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