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PDF AKD5700-A Data sheet ( Hoja de datos )
| Número de pieza | AKD5700-A | |
| Descripción | digital audio 16bit A/D converter | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
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ASAHI KASEI
[AKD5700-A]
AKD5700-A
AK5700 Evaluation board Rev.0
GENERAL DESCRIPTION
AKD5700-A is an evaluation board for the portable digital audio 16bit A/D converter, AK5700. AKD5700-A
also has the digital audio interface and can achieve the interface with digital audio systems via
opt-connector.
Ordering guide
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AKD5700-A
--- Evaluation board for AK5700
(Cable for connecting with printer port of IBM-AT compatible PC and control
software are packed with this. This control software does not support Windows NT.)
FUNCTION
• DIT with optical output
• RCA connector for an external clock input
• 10pin Header for serial control interface
AVDD DVDD VD AGND DGND
5V 3.3V
Regulator
Control Data
10pin Header
AIN1/
AIN2/
AIN+
MIC AK5700
DSP 2
10pin Header
AIN-
EXT/LRCK
EXT/BCLK
AK4114
(DIT)
CLOCK
GEN
DSP 1
10pin Header
Opt Out
Figure 1. AKD5700-A Block Diagram
* Circuit diagram and PCB layout are attached at the end of this manual.
<KM087000>
-1-
2006 / 12
1 page  
ASAHI KASEI
(2-a) In the case of using AK4114.
*This mode is BCLK=64fs, LRCK=1fs only.
Set up jumper pins of MCKI clock
*In the case of using X1, JP16 should be open.
JP16
JP19
XTI MCLK_SEL
[AKD5700-A]
JP11
MKFS
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5700 EXT
4114 EXT
256fs 512fs 1024fs MCKO
Set up jumper pins of BCLK clock
JP18
LRCK_SEL
JP13
LRCK
EXT EXT EXTLRCK/ LRCK/
LRCK DIT
DIT
Set up jumper pins of LRCK clock
JP17
BCLK_SEL
2fs 1fs
JP12
BCLK
EXT EXT EXTBCLK/ BCLK/
BCLK
DIT
DIT
64fs 32fs 16fs
<KM087000>
-5-
2006 / 12
5 Page 
ASAHI KASEI
[AKD5700-A]
Other jumper pins set up
1. JP1 (GND)
OPEN
SHORT
: Analog ground and Digital ground
: Separated.
: Common. (The connector “DGND” should be open.) <Default>
2. JP2 (AVDD_SEL) : AVDD of the AK5700
OPEN
: AVDD is supplied from the regulator (“AVDD” jack should be open). < Default >
SHORT : AVDD is supplied from “AVDD ” jack.
3. JP3 (DVDD_SEL) : DVDD of the AK5700
AVDD
: DVDD is supplied from “AVDD”. < Default >
DVDD
: DVDD is supplied from “DVDD ” jack.
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4. JP4 (CSP)
H
L
: CSP signal Select (Hi or Low)
: CSP= “Hi”
: CSP= “Low”< Default >
5. JP5, JP6 (MPWR) : Connect to MPWR
OPEN
: No connect< Default >
SHORT : Connect
6. JP7 (LVC_SEL) : Supply line selection of Logic block of LVC.
DVDD
: Logic block of LVC is supplied from “DVDD”. < Default >
VD : Logic block of LVC is supplied from “VD ” jack.
7. JP20 (SDTO)
OPEN
SHORT
: Select #4 pin of the PORT4 (DSP)
: Input data for EXSDTI<Default>
: Output data for SDTO of the PORT4
8. JP8 (CCLK)
OPEN
SHORT
: CCLK select
: No connect
: CCLK connect <Default>
<KM087000>
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2006 / 12
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AKD5700-A.PDF ] | |
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