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부품번호 MC34055 기능
기능 IEEE 802.3 10BASE-T TRANSCEIVER
제조업체 Motorola Semiconductors
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MC34055 데이터시트, 핀배열, 회로
Order this document by MC34055/D
IEEE 802.3 10BASE-T
Transceiver
The Motorola 10BASE–T transceiver, designed to comply with the ISO
8802–3 [IEEE 802.3] 10BASE–T specification, will support a Medium
Dependent Interface (MDI) in an embedded Media Attachment Unit (MAU)*.
The interface supporting the Data Terminal Equipment (DTE) is TTL, CMOS,
and raised ECL compatible, and the interface to the Twisted Pair (TP) media
is supported through standard 10BASE–T filters and transformers.
Differential data intended for the TP media is provided a 50 ns pre–emphasis
and data at the TP receiver is screened by Smart Squelch circuitry for
specific threshold, pulse width, and sequence requirements.
www.DataSheet4U.cOotmher features of the MC34055 include: Collision and Jabber detection
status outputs, select mode pins for forcing Loop Back and Full–Duplex
operation, a Signal Quality Error pin for testing the collision detect circuitry
without affecting the TP output, and a LED driver for Link Integrity status. An
on–chip oscillator, capable of receiving a clock input or operating under
crystal control, is also provided for internal timing and driving a buffered
clock output.
The MC34055 is manufactured on a BiCMOS process and is packaged in
a 24 pin SOIC.
BiCMOS Technology for Low Power Operation
Standard 5.0 V, ± 5% Voltage Supply
Smart Squelch Enforcement of Threshold, Pulse Width, and Sequence
Requirements
Driver Pre–Emphasis for Output Data
TTL, CMOS and Raised ECL Compatible
Interfaces to TP Media with Standard 10BASE–T Filters and
Transformers
LED Capable Status Outputs for Collision, Jabber Detection, and Link
Integrity
Directly Driven or Crystal Controlled Clock Oscillator
Selectable Full–Duplex Operation
Signal Quality Error Test Pin
Selectable Loop Back
MAXIMUM RATINGS (TA = 25°C, unless otherwise noted.)
Rating
Symbol
Value
Unit
Power Supply Voltage
Differential Voltage at RX+/RX–
Voltage Applied to Logic and Mode/Test
Select Inputs
VCC
VID
– 0.5 to 7.0
– 5.25 to 5.25
– 0.5 to 5.5
Vdc
Vdc
Vdc
Voltage Applied to Logic Outputs and
Output Status Pins
– 0.5 to 7.0 Vdc
Ambient Operating Temperature Range
TA
0 to 70
°C
Junction Temperature
TJ
– 65 to 150
°C
NOTE: Devices should not be operated at these limits. The “Recommended Operating
Conditions” table provides for actual device operation.
MC34055
10BASE–T TRANSCEIVER
SEMICONDUCTOR
TECHNICAL DATA
24
1
DW SUFFIX
PLASTIC PACKAGE
CASE 751E
(SO–24L)
PIN CONNECTIONS
Clk Out 1
TX Data A 2
TX Data B 3
TX EN H 4
Dig. Gnd 5
VCC(Dig/Ana) 6
Ana. Gnd 7
RX Data A 8
RX Data B 9
RX EN H 10
Loop L 11
LNKFL H 12
24 Clk+
23 Clk–
22 SQE EN L
21 TX+
20 TX–
19 Pwr Gnd
18 Pwr VCC
17 FULLD L
16 RX+
15 RX–
14 CTL H
13 JABB H
ORDERING INFORMATION
Device
Operating
Temperature Range Package
MC34055DW TA = 0° to +70°C
SO–24L
MOTOROLA ANALOG IC DEVICE DATA
© Motorola, Inc. 1996
Rev 1
1




MC34055 pdf, 반도체, 판매, 대치품
MC34055
TIMING CHARACTERISTICS (0°C TA 70°C)
Characteristic
Symbol
Min
Typ
Max Unit
TRANSMIT START TIMING
TX EN H to TX+/TX– Enable Time
tTXEN
– 75 ns
TX Data A/B to TX+/TX– Enable Time
tFDXD
– 75 ns
Steady State Propagation Delay of TX Data A/B to TX+/TX– Output
tTXSS
– 75 ns
Pre–Emphasis Pulse Width
tPRCM
45
55 ns
Transmitter Caused Edge Skew Between TX+ and TX–
tSkew T
– 2.0 ns
Transmitter Added Edge Jitter to TX+/TX– from TX Data A/B
tJitter T
– 4.0 ns
Steady–State Delay between the TX Data A/B Input to the RX Data
A/B Outputs for Normal Operation
tTXRX
– 50 ns
TX EN H Assert to RX EN H Assert Under Normal Operation
www.DataSheet4UT.RcAomNSMIT STOP TIMING
Delay between TX EN H Low and TX+/TX– High
TX EN H Assert/De–assert Delay from TX EN H to RX EN H
Assert/De–assert
tDREL
tTXDH
tXTRE
– 50 ns
– 75 ns
– 400 ns
End of Packet Hold Time from Last TX Data A/B Edge or
TX EN H De–assert
tTDDC
250
– ns
LINK BEAT PULSES
Output Link Test Pulse Width
Minimum Link Beat Pulse Duration on RX+/RX–
LOOP BACK MODE TIMING
Delay from Loop L Deassertion to RX EN H Driven from
TX EN H Status
tLKPW
tLDCY_A
tLTRA
80
80
– 120 ns
– 192 ns
– 30 ns
TX EN H Assert/De–assert to RX EN H, Assert/De–assert when in
Loop–Back Mode and Receiver Inactive
tLTRX
– 50 ns
Steady–State TX Data A/B to RX Data A/B when in Loop–Back Mode
SMART SQUELCH
Interval Unit Squelch Deactivation
tLTRD
tSQ
– 50 ns
– 5.0 Bit
Times
RECEIVE START TIMING
Receiver–Added Edge Skew to RX Data A/B Signal
Receiver–Added Edge Jitter to RX Data A/B Signal
Start–Up Delay from RX+/RX– to RX Data A/B
Delay from RX EN H Assertion Until RX Data A/B Valid
Steady–State Propagation Delay from RX+/RX– Data A/B
RECEIVE SHUTDOWN TIMING
Last received Data Edge until the RX EN H Output forces low
tSkew R
– 1.5 ns
tJitter R
– 1.5 ns
tRXNE
– 50 ns
tRARE
–10
+10 ns
tRXSS
– 50 ns
tRXDE
155
250 ns
4 MOTOROLA ANALOG IC DEVICE DATA

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MC34055 전자부품, 판매, 대치품
Pin
1
2
3
4
5
6
7
www.DataSheet4U.com 8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Symbol
Clk Out
TX Data A
TX Data B
TX EN H
Dig. Gnd
VCC(Dig/Ana)
Ana. Gnd
RX Data A
RX Data B
RX EN H
Loop L
LNKFL H
JABB H
CTL H
RX–
RX+
FULLD L
Pwr VCC
Pwr Gnd
TX–
TX+
SQE EN L
Clk–
Clk+
MC34055
PIN FUNCTION DESCRIPTION
Description
TTL/CMOS buffered 10 MHz clock output. This pin will source 400 µA and sink 16 mA.
CMOS transmit input pin. Data input at this pin is output to the TP media. The input will source
less than 175 µA and sink less than 20 µA.
Raised ECL transmit input pin. Data input at this pin is output to the TP media. The input can
source 40 µA for a high level input or 70 µA for a low level input.
TTL/CMOS transmit enable pin. Transmit is enabled when asserted high. The input will source
less than 175 µA and sink less than 20 µA.
Digital ground
Digital and analog VCC. With the current consumed at this pin and Pin 18, the device will
consume less than 180 mA at 5.0 Vdc.
Analog ground
TTL/CMOS received data output pin. Data from the TP media is output at this pin. The output
will source 12 mA and sink 16 mA.
Raised ECL received data output pin. Data from the TP media is output at this pin.
TTL/CMOS received data output enable pin. This pin is asserted after the Smart Squelch
circuitry determines that there is valid data at the TP input pins and also when internal
loop–back is occurring. The output will source 12 mA and sink 16 mA. The receive data outputs
are forced high when this pin is low.
TTL/CMOS Loopback test select. Asserting this pin causes the transmit data to be looped to
the receive circuit while the TP transmit driver sends a link pulse. The input will source less
than 175 µA and sink less than 20 µA.
This pin is driven high to indicate a link fail state. When low, the pin will sink 20 mA to light an
LED. An usquelched condition due to valid data on the receive circuit will cause the pin to
transition high and low in 100 ms intervals.
TTL/CMOS Jabber status pin. This pin is asserted when a Jabber condition is detected and will
source 12 mA and sink 16 mA.
TTL/CMOS status pin. This pin pulled high when Jabber or Collision conditions are detected.
Also high for a time interval when a Signal Quality Error test is being performed. The pin will
source 12 mA and sink 16 mA.
The inverting terminal of the TP differential receiver.
The noninverting terminal of the TP differential receiver.
TTL/CMOS duplex mode select. When low, this pin forces the device to operate in full–duplex
mode. The input will source less than 175 µA and sink less than 20 µA.
Power supply pin. With the current consumed at this pin and Pin 6, the device will consume
less than 180 mA at 5.0 Vdc.
Power ground pin.
The inverting terminal of the TP differential driver.
The noninverting terminal of the TP differential driver.
TTL/CMOS Signal Quality Error test enable pin. Pulling this pin low allows test of the collision
detect circuitry without affecting the twisted pair channel. The input will source less than 175 µA
and sink less than 20 µA.
TTL/CMOS clock oscillator pin. See Pin 24.
TTL/CMOS clock oscillator pin. This pin is used with Pin 23 if the internal oscillator is to be free
run with a crystal. The oscillator can also be directly driven with a TTL/CMOS clock signal at
this pin. The oscillator frequency should be 10 MHz with a duty cycle of 50 ± 20%.
MOTOROLA ANALOG IC DEVICE DATA
7

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