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PDF ATH30 Data sheet ( Hoja de datos )
| Número de pieza | ATH30 | |
| Descripción | 3.3-V Input Non-Isolated Wide-Output Adjust Power Module | |
| Fabricantes | Astec | |
| Logotipo |  |
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ATH06T033 Series —3.3-V Input
6-A, 3.3-V Input Non-Isolated
Wide-Output Adjust Power Module
REVISION 00 (01DEC2003)
NOMINAL SIZE = 0.87 in x 0.5 in
(22,1 mm x 12,57 mm)
www.DataSheet4U.com
Features
• Up to 6-A Output Current
• 3.3-V Input Voltage
• Wide-Output Voltage Adjust
(0.8 V to 2.5 V)
• Efficiencies up to 94 %
• 103 W/in³ Power Density
• On/Off Inhibit
• Pre-Bias Startup
• Under-Voltage Lockout
• Operating Temp: –40 to +85 °C
• Auto-Track™ Sequencing
• Output Over-Current Protection
(Non-Latching, Auto-Reset)
• IPC Lead Free 2
• Safety Agency Approvals (Pending)
UL 1950, CSA 22.2 950, &
EN60950
• Point-of-Load Alliance (POLA)
Compatible
Description
The ATH06T033 series is one of the
smallest non-isolated power modules that
features Auto-Track™. Auto-Track™
simplifies supply voltage sequencing in
power systems by enabling modules to track
each other, or any other external voltage,
during power up and power down.
Although small in size (0.87 in × 0.5 in),
these modules are rated for up to 6 A of
output current, and are an ideal choice in
applications where space, performance,
and a power-up sequencing capability are
important attributes.
The product provides high-performance
step-down conversion from a 3.3-V input
bus voltage. The output voltage of the
ATH06T033 can be set to any voltage
over the range, 0.8 V to 2.5 V, using a
single resistor.
Other operating features include an
on/off inhibit, output voltage adjust (trim),
and output over-current protection. For
high efficiency these parts employ a
synchronous rectifier output stage, but a
pre-bias hold-off capability ensures that
the output will not sink current during
startup.
Target applications include telecom,
industrial, and general purpose circuits,
including low-power dual-voltage systems
that use a DSP, microprocessor, ASIC, or
FPGA.
Package options include both through-
hole and surface mount configurations.
Pin Configuration
Pin Function
1 GND
2 Track
3 Vin
4 Inhibit *
5 Vo Adjust
6 Vout
* Denotes negative logic:
Open = Normal operation
Ground = Function active
ASuetoq-uTerancckin™g
Standard Application
Track
VIN
CIN
100 µF
(Required)
Inhibit
GND
Rset = Required to set the output voltage to a value
higher than 0.8 V. (See spec. table for values)
Cin = Required 100 µF
Co1 = Optional 100 µF capacitor
Co2 = Optional 10 µF ceramic capacitor for reduced
output ripple.
16
2
3 APT(TTHHo0p06T3V00i3e53w0-W9)S
45
RSET
1 %, 0.1 W
(Required)
Co1
100 µF
Electrolytic
(Optional)
VOUT
Co2
10 µF
Ceramic
(Optional)
GND
North America (USA): 1-888-41-ASTEC
Europe (UK): 44(1384)842-211
Asia (HK): 852-2437-9662
1 page  
Application Notes
ATH06T033 & ATH06T05 Series
Adjusting the Output Voltage of the ATH06T033
& ATH06T05 Wide-Output Adjust Power Modules
The Vo Adjust control (pin 5) sets the output voltage to a
value higher than 0.8 V. The adjustment range of the
ATH06T033 (3.3-V input) is from 0.8 V to 2.5 V 1, and
the ATH06T05-9xx (5-V input) from 0.8 V to 3.6 V. The
adjustment method requires the addition of a single
external resistor, Rset, that must be connected directly
between the Vo Adjust and GND pins 2. Table 1-1 gives
the preferred value of the external resistor for a number
of standard voltages, along with the actual output volt-
age that this resistance value provides.
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For other output voltages the value of the required resistor
can either be calculated using the following formula, or
simply selected from the range of values given in Table 1-2.
Figure 1-1 shows the placement of the required resistor.
Rset
=
10 kΩ ·
0.8 V
Vout – 0.8 V
– 2.49 kΩ
Table 1-1; Preferred Values of Rset for Standard Output Voltages
Vout (Standard)
3.3 V 1
2.5 V
2V
1.8 V
1.5 V
1.2 V
1V
0.8 V
Rset (Pref’d Value)
698 Ω
2.21 kΩ
4.12 kΩ
5.49 kΩ
8.87 kΩ
17.4 kΩ
36.5 kΩ
Open
Vout (Actual)
3.309V
2.502 V
2.010 V
1.803 V
1.504 V
1.202 V
1.005 V
0.8 V
Figure 1-1; Vo Adjust Resistor Placement
2
Track
VIN
3 VIN PTAHTH0056T00550-9WJ
6
VO
VOUT
Inhibit
3
GND
1
CIN
100 µF
(Required)
4
RSET
1%
0.1 W
COUT
100 µF
(Optional)
GND
Table 1-2; Output Voltage Set-Point Resistor Values
Va Req’d
Rset
Va Req’d
Rset
0.800
0.825
0.850
0.875
0.900
0.925
0.950
0.975
1.000
1.025
1.050
1.075
1.100
1.125
1.150
1.175
1.200
1.225
1.250
1.275
1.300
1.325
1.350
1.375
1.400
1.425
1.450
1.475
1.50
1.55
1.60
1.65
1.70
1.75
1.80
1.85
1.90
1.95
Open
318 kΩ
158 kΩ
104 kΩ
77.5 kΩ
61.5 kΩ
50.8 kΩ
43.2 kΩ
37.5 kΩ
33.1 kΩ
29.5 kΩ
26.6 kΩ
24.2 kΩ
22.1 kΩ
20.4 kΩ
18.8 kΩ
17.5 kΩ
16.3 kΩ
15.3 kΩ
14.4 kΩ
13.5 kΩ
12.7 kΩ
12.1 kΩ
11.4 kΩ
10.8 kΩ
10.3 kΩ
9.82 kΩ
9.36 kΩ
8.94 kΩ
8.18 kΩ
7.51 kΩ
6.92 kΩ
6.4 kΩ
5.93 kΩ
5.51 kΩ
5.13 kΩ
4.78 kΩ
4.47 kΩ
2.00 4.18 kΩ
2.05 3.91 kΩ
2.10 3.66 kΩ
2.15 3.44 kΩ
2.20 3.22 kΩ
2.25 3.03 kΩ
2.30 2.84 kΩ
2.35 2.67 kΩ
2.40 2.51 kΩ
2.45 2.36 kΩ
2.50 2.22 kΩ
2.55 2.08 kΩ
2.60 1.95 kΩ
2.65 1.83 kΩ
2.70 1.72 kΩ
2.75 1.61 kΩ
2.80 1.51 kΩ
2.85 1.41 kΩ
2.90 1.32 kΩ
2.95 1.23 kΩ
3.00 1.15 kΩ
3.05 1.07 kΩ
3.10 988 Ω
3.15 914 Ω
3.20 843 Ω
3.25 775 Ω
3.30 710 Ω
3.35 647 Ω
3.40 587 Ω
3.45 529 Ω
3.50 473 Ω
3.55 419 Ω
3.60 367 Ω
Notes:
1. Modules that operate from a 3.3-V input bus should
not be adjusted higher than 2.5 V.
2. Use a 0.1 W resistor. The tolerance should be 1 %, with
temperature stability of 100 ppm/°C (or better). Place
the resistor as close to the regulator as possible. Connect
the resistor directly between pins 5 and 1 using dedicated
PCB traces.
3. Never connect capacitors from Vo Adjust to either GND or
Vout. Any capacitance added to the Vo Adjust pin will affect
the stability of the regulator.
North America (USA): 1-888-41-ASTEC
Europe (UK): 44(1384)842-211
Asia (HK): 852-2437-9662
5 Page 
Application Notes
ATH Series of Wide-Output Adjust Power
Modules (3.3/5-V Input)
Margin Up/Down Controls
The ATH10 (10A), ATH12/15 (12/15A), ATH18/22 (18/
22A) and ATH26/30 (26/30A) products incorporate Margin
Up and Margin Down control inputs. These controls allow
the output voltage to be momentarily adjusted 1, either up
or down, by a nominal 5 %. This provides a convenient
method for dynamically testing the operation of the load
circuit over its supply margin or range. It can also be used to
verify the function of supply voltage supervisors. The
±5 % change is applied to the adjusted output voltage, as set
by the external resistor, Rset at the Vo Adjust pin.
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The 5 % adjustment is made by pulling the appropriate
margin control input directly to the GND terminal 2.
A low-leakage open-drain device, such as an n-channel
MOSFET or p-channel JFET is recommended for this
purpose 3. Adjustments of less than 5 % can also be accom-
modated by adding series resistors to the control inputs
(See Figure 3-4). The value of the resistor can be selected
from Table 3-2, or calculated using the following formula.
Up/Down Adjust Resistance Calculation
To reduce the margin adjustment to something less than
5 %, series resistors are required (See RD and RU in
Figure 3-7). For the same amount of adjustment, the
resistor value calculated for RU and RD will be the same.
The formulas is as follows.
RU or RD=
499
∆%
– 99.8
kΩ
Where ∆% = The desired amount of margin adjust in
percent.
Notes:
1. The Margin Up* and Margin Dn* controls were not
intended to be activated simultaneously. If they are
their affects on the output voltage may not completely
cancel, resulting in the possibility of a slightly higher
error in the output voltage set point.
2. The ground reference should be a direct connection to
the module GND at pin 7 (pin 1 for the ATH06).
This will produce a more accurate adjustment at the
load circuit terminals. The transistors Q1 and Q2 should
be located close to the regulator.
3. The Margin Up and Margin Dn control inputs are not
compatible with devices that source voltage. This includes
TTL logic. These are analog inputs and should only be
controlled with a true open-drain device (preferably
a discrete MOSFET transistor). The device selected
should have low off-state leakage current. Each input
sources 8 µA when grounded, and has an open-circuit
voltage of 0.8 V.
Table 3-2; Margin Up/Down Resistor Values
% Adjust
5
4
3
2
1
RU / RD
0.0 kΩ
24.9 kΩ
66.5 kΩ
150.0 kΩ
397.0 kΩ
Figure 3-7; Margin Up/Down Application Schematic
1
VIN 2
+
Cin
MargDn
MargUp
RD RU
Q1
Q2
GND
10 9 8
AP(TTTHHo1p055TV00i51e-0w9WS)
345
7
6
RSET
0.1 W, 1 %
+Vo
0V
+VOUT
Cout
+
L
O
A
D
GND
North America (USA): 1-888-41-ASTEC
Europe (UK): 44(1384)842-211
Asia (HK): 852-2437-9662
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet ATH30.PDF ] | |
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