|
|
|
부품번호 | P521-38 기능 |
|
|
기능 | Low Phase Noise PECL VCXO | ||
제조업체 | PhaseLink Corporation | ||
로고 | |||
전체 6 페이지수
Preliminary P521-38
Low Phase Noise PECL VCXO (65MHz to 130MHz)
FEATURES
• 65MHz to 130MHz Fundamental Mode Crystal.
• Output range: 65MHz – 130MHz.
• Complementary PECL outputs.
• Selectable OE Logic (enable high or enable low).
• Integrated variable capacitors.
• High pull linearity: < 5%.
www.DataShe•et4U.+c/o-m125 ppm pull range
• Supports 2.5V or 3.3V-Power Supply.
• Available in die form.
• Thickness 10 mil.
DESCRIPTIONS
P521-38 is a VCXO IC specifically designed to pull
high frequency fundamental crystals. Its internal
varicaps allow an on chip frequency pulling,
controlled by the VCON input. The chip provides a
low phase noise, low jitter PECL differential clock
output.
BLOCK DIAGRAM
VCON Oscillator
Amplifier
X+
w/
integrated
varicaps
X-
OE
Q
Q
P521-38
DIE CONFIGURATION
57.5 mil
GNDOSC 18
17 16
VCON 19
XIN 20
XOUT 21
OE 22
1
2
(1460,1435)
15 14 13
12
11
34
10
9
8
7
56
VDDANA
VDDBUF
VDDBUF
PECLBAR
PECL
GNDBUF
Y (0,0)
X
DIE SPECIFICATIONS
Name
Size
Reverse side
Pad dimensions
Thickness
Value
56.5 x 57.5 mil
GND
80 micron x 80 micron
10 mil
OUTPUT ENABLE LOGIC SELECTION
OESEL
(Pad #14)
OECTRL
(Pad #22)
State
0 (Default)
0 (Default) Output enabled
1 Tri-state
1
0 Tri-state
1 (Default) Output enabled
Pad #14, 22: Bond to GND to set to “0”, bond to VDD to set to “1”
No connection results to “default” setting through internal pull-up/-down.
Pad #22: Logical states defined by PECL VIH and VIL levels.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 3/02/04 Page 1
Preliminary P521-38
Low Phase Noise PECL VCXO (65MHz to 130MHz)
4. General Electrical Specifications
PARAMETERS
Supply Current (Loaded Outputs)
Output valid after OE enabled
Operating Voltage
Output Clock Duty Cycle
www.DataSheet4U.com
Short Circuit Current
SYMBOL
CONDITIONS
IDD at 3.3V @ 77.76MHz
Oscillator off
Oscillator on
VDD
@ Vdd – 1.3V (PECL)
MIN.
2.25
45
TYP.
10
50
±50
MAX.
45
1
3.63
55
UNITS
mA
ms
V
%
mA
5. Jitter specifications
PARAMETERS
CONDITIONS
Period jitter RMS at 77.76MHz
Period jitter peak-to-peak at 77.76MHz
Accumulated jitter RMS at 77.76MHz
Accumulated jitter peak-to-peak at 77.76MHz
Random Jitter
Integrated jitter RMS at 77.76MHz
Measured on Wavecrest SIA 3000
At 77.76MHz, with capacitive
decoupling between VDD and GND.
Over 10,000 cycles
At 77.76MHz, with capacitive
decoupling between VDD and GND.
Over 1,000,000 cycles.
“RJ” measured on Wavecrest SIA 3000
Integrated 12 kHz to 20 MHz
MIN.
TYP.
2.5
18.5
2.5
24
2.5
0.5
MAX.
20
27
0.7
UNITS
ps
ps
ps
ps
6. Phase noise specifications
PARAMETERS FREQUENCY
Phase Noise
relative to carrier
77.76MHz
Note: Phase Noise measured at VCON = 0V
10Hz
-75
100Hz
-100
1kHz
-125
10kHz
-140
100kHz
-145
1MHz
-150
UNITS
dBc/Hz
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 3/02/04 Page 4
4페이지 | |||
구 성 | 총 6 페이지수 | ||
다운로드 | [ P521-38.PDF 데이터시트 ] |
당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는 |
구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
P521-38 | Low Phase Noise PECL VCXO | PhaseLink Corporation |
P521-39 | Low Phase Noise PECL VCXO | PhaseLink Corporation |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |