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PDF ADP1713 Data sheet ( Hoja de datos )

Número de pieza ADP1713
Descripción CMOS Linear Regulator
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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FEATURES
Maximum output current: 300 mA
Input voltage range: 2.5 V to 5.5 V
Light load efficient
IGND = 75 μA with 100 μA load
Low shutdown current: <1 μA
Very low dropout voltage: 170 mV @ 300 mA load
www.DataSheeItn4iUti.acol amccuracy: ±1%
Accuracy over line, load, and temperature: ±2%
16 fixed output voltage options with soft start:
0.75 V to 3.3 V (ADP1712)
Adjustable output voltage option: 0.8 V to 5.0 V
(ADP1712 Adjustable)
16 fixed output voltage options with reference bypass:
0.75 V to 3.3 V (ADP1713)
16 fixed output voltage options with tracking:
0.75 V to 3.3 V (ADP1714)
Low output noise: 40 μV rms
High PSRR: 72 dB @ 1 kHz
Stable with small 2.2 μF ceramic output capacitor
Excellent load/line transient response
Current limit and thermal overload protection
Logic controlled enable
5-lead TSOT package
APPLICATIONS
Mobile phones
Digital camera and audio devices
Portable and battery-powered equipment
Post dc-dc regulation
GENERAL DESCRIPTION
The ADP1712/ADP1713/ADP1714, available in a tiny, 5-lead
TSOT package, are low dropout linear regulators that operate
from 2.5 V to 5.5 V and provide up to 300 mA of output current.
The low 170 mV dropout voltage at a 300 mA load improves
efficiency and allows operation over a wide input voltage range.
Using a novel scaling architecture, ground current is a very low
75 μA when driving a 100 μA load, making the ADP1712/
ADP1713/ADP1714 ideal for battery-operated portable equipment.
The ADP1712/ADP1713/ADP1714 are available in 16 fixed
output voltage options. The ADP1712 is also available in an
adjustable version, which allows output voltages that range from
0.8 V to 5 V via an external divider. The ADP1712 fixed version
allows an external capacitor to be connected to program the
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
300 mA, Low Dropout
CMOS Linear Regulator
ADP1712/ADP1713/ADP1714
TYPICAL APPLICATION CIRCUITS
VIN = 5V
2.2µF
ADP1712
1 IN
VOUT = 3.3V
OUT 5
2 GND
2.2µF
3 EN
10nF
SS 4
Figure 1. ADP1712 with Fixed Output Voltage and Soft-Start Capacitor, 3.3 V
VIN = 5.5V
2.2µF
ADP1712
ADJUSTABLE
1 IN
OUT
VOUT = 0.8V(1 + R1/R2)
5
2 GND
3 EN
ADJ 4
2.2µF
R1
R2
Figure 2. ADP1712 with Adjustable Output Voltage, 0.8 V to 5.0 V
VIN = 3V
2.2µF
ADP1713
1 IN
VOUT = 0.75V
OUT 5
2 GND
3 EN
10nF
BYP 4
2.2µF
Figure 3. ADP1713 with Fixed Output Voltage and Bypass Capacitor, 0.75 V
VIN = 3V
2.2µF
ADP1714
1 IN
OUT 5
2 GND
VOUT VOUT (V)
2.2µF
3
2
3 EN
TRK 4
0V TO 5V
1
0 12345
VTRK (V)
Figure 4. ADP1714 with Output Voltage Tracking
soft-start time. The ADP1713 allows a reference bypass capacitor
to be connected, which reduces output voltage noise and
improves power supply rejection. The ADP1714 includes a
tracking feature, which allows the output to follow an external
voltage rail or reference.
The ADP1712/ADP1713/ADP1714 are optimized for stable
operation with small 2.2 μF ceramic output capacitors, allowing
good transient performance while occupying minimal board
space. An enable pin controls the output voltage on all devices,
and an undervoltage lockout circuit disables the regulator if IN
drops below a minimum threshold. The parts also have short
circuit protection and thermal overload protection, which
prevent damage to the devices in adverse conditions.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.

1 page




ADP1713 pdf
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Rating
IN to GND
–0.3 V to +6 V
OUT to GND
–0.3 V to IN
EN to GND
–0.3 V to +6 V
SS/ADJ/BYP/TRK to GND
–0.3 V to +6 V
Storage Temperature Range
–65°C to +150°C
Operating Junction Temperature Range
–40°C to +125°C
Lead Temperature, Soldering (10 sec)
300°C
Soldering Conditions
JEDEC J-STD-020
www.DataSheet4U.com
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ADP1712/ADP1713/ADP1714
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type
5-Lead TSOT
θJA
170
Unit
°C/W
ESD CAUTION
Rev. 0 | Page 5 of 16

5 Page





ADP1713 arduino
ADP1712/ADP1713/ADP1714
ADJUSTABLE OUTPUT VOLTAGE
(ADP1712 ADJUSTABLE)
The ADP1712 adjustable version can have its output voltage
set over a 0.8 V to 5.0 V range. The output voltage is set by
connecting a resistive voltage divider from OUT to ADJ. The
output voltage is calculated using the equation
VOUT = 0.8 V (1 + R1/R2)
(2)
where:
R1 is the resistor from OUT to ADJ.
R2 is the resistor from ADJ to GND.
www.DataSheeTt4hUe.cmomaximum bias current into ADJ is 100 nA, so for less
than 0.5% error due to the bias current, use values less than
60 kΩ for R2.
BYPASS CAPACITOR (ADP1713)
The ADP1713 allows for an external bypass capacitor to be
connected to the internal reference, which reduces output
voltage noise and improves power supply rejection. A low
leakage capacitor of 1 nF or greater (10 nF is recommended)
must be connected between the BYP and GND pins.
TRACK MODE (ADP1714)
The ADP1714 includes a tracking mode feature. As shown in
Figure 28, if the voltage applied at the TRK pin is less than the
nominal output voltage, OUT is equal to the voltage at TRK.
Otherwise, OUT regulates to its nominal output value.
For example, consider an ADP1714 with a nominal output
voltage of 3 V. If the voltage applied to its TRK pin is greater than
3 V, OUT maintains a nominal output voltage of 3 V. If the volt-
age applied to TRK is reduced below 3 V, OUT tracks this voltage.
OUT can track the TRK pin voltage from the nominal value all
the way down to 0 V. A voltage divider is present from TRK to the
error amplifier input with a divider ratio equal to the divider
from OUT to the error amplifier. This sets the output voltage
equal to the tracking voltage. Both divider ratios are set by post-
package trim, depending on the desired output voltage.
4
3
2
1
0
01234
VTRK (V)
Figure 28. ADP1714 Output Voltage vs. Tracking Voltage
with Nominal Output Voltage Set to 3 V
5
ENABLE FEATURE
The ADP1712/ADP1713/ADP1714 use the EN pin to enable
and disable the OUT pin under normal operating conditions.
As shown in Figure 29, when a rising voltage on EN crosses the
active threshold, OUT turns on. When a falling voltage on EN
crosses the inactive threshold, OUT turns off.
EN
OUT
1
VIN = 5V
VOUT = 1.6V
COUT = 2.2μF
ILOAD = 10mA
TIME (4ms/DIV)
Figure 29. ADP1712 Adjustable Typical EN Pin Operation
As can be seen, the EN pin has hysteresis built in. This prevents
on/off oscillations that can occur due to noise on the EN pin as
it passes through the threshold points.
The EN pin active/inactive thresholds are derived from the IN
voltage. Therefore, these thresholds vary with changing input
voltage. Figure 30 shows typical EN active/inactive thresholds
when the input voltage varies from 2.5 V to 5.5 V.
1.4
1.3
1.2
1.1 EN ACTIVE
1.0 HYSTERESIS
0.9
0.8
EN INACTIVE
0.7
0.6
0.5
2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50
VIN (V)
Figure 30. Typical EN Pin Thresholds vs. Input Voltage
UNDERVOLTAGE LOCKOUT (UVLO)
The ADP1712/ADP1713/ADP1714 have an undervoltage
lockout circuit, which monitors the voltage on the IN pin.
When the voltage on IN drops below 2 V (minimum), the
circuit activates, disabling the OUT pin.
Rev. 0 | Page 11 of 16

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