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PDF K4T1G084QC Data sheet ( Hoja de datos )
| Número de pieza | K4T1G084QC | |
| Descripción | (K4T1G044QC / K4T1G084QC) 1Gb C-die DDR2 SDRAM Specification | |
| Fabricantes | Samsung semiconductor | |
| Logotipo |  |
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K4T1G044QC
K4T1G084QC
DDR2 SDRAM
1Gb C-die DDR2 SDRAM Specification
www.DataSheet4U.com
60FBGA & 84FBGA with Pb-Free
(RoHS compliant)
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL
INFORMATION IN THIS DOCUMENT IS PROVIDED
ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
applications where Product failure couldresult in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
* Samsung Electronics reserves the right to change products or specification without notice.
1 of 26
Rev. 1.1 June 2007
1 page  
K4T1G044QC
K4T1G084QC
3.0 Package Pinout/Mechanical Dimension & Addressing
3.1 x4 package pinout (Top View) : 60ball FBGA Package
1 23
7 89
www.DataSheet4U.com
VDD NC VSS A VSSQ DQS VDDQ
NC VSSQ DM B DQS VSSQ NC
VDDQ DQ1 VDDQ C VDDQ DQ0 VDDQ
NC VSSQ DQ3 D DQ2 VSSQ NC
VDDL VREF VSS
E VSSDL CK
VDD
CKE WE F RAS CK ODT
BA2 BA0 BA1 G CAS CS
A10/AP A1 H A2 A0 VDD
VSS
A3
A5
J
A6
A4
A7 A9 K A11 A8 VSS
VDD A12 NC L NC A13
Note :
1. Pin A3 has identical capacitance as pin A7.
2. VDDL and VSSDL are power and ground for the DLL.
DDR2 SDRAM
Ball Locations (x4)
: Populated Ball
+ : Depopulated Ball
Top View (See the balls through the Package)
123456789
A
B
C
D
E
F+
G
H+
J
K+
L
+ ++
+ ++
+ ++
+ ++
+ ++
+ ++
+ ++
+ ++
+ ++
+ ++
+ ++
+
+
+
5 of 26
Rev. 1.1 June 2007
5 Page 
K4T1G044QC
K4T1G084QC
DDR2 SDRAM
7.2 Operating Temperature Condition
Symbol
Parameter
Rating
Units
Notes
TOPER
Operating Temperature
0 to 95
°C
1, 2
1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to
JESD51.2 standard.
2. At 85 - 95 °C operation temperature range, doubling refresh commands in frequency to a 32ms period ( tREFI=3.9 us ) is required, and to enter to
self refresh mode at this temperature range, an EMRS command is required to change internal refresh rate.
7.3 Input DC Logic Level
Symbol
VIH(DC)
www.DataSheet4VUIL.(cDoCm)
Parameter
DC input logic high
DC input logic low
Min.
VREF + 0.125
- 0.3
Max.
VDDQ + 0.3
VREF - 0.125
Units
V
V
Notes
7.4 Input AC Logic Level
Symbol
VIH (AC)
VIL (AC)
Parameter
AC input logic high
AC input logic low
DDR2-400, DDR2-533
Min.
VREF + 0.250
Max.
-
- VREF - 0.250
DDR2-667, DDR2-800
Min.
VREF + 0.200
Max.
VREF - 0.200
Units
V
V
7.5 AC Input Test Conditions
Symbol
Condition
Value
Units
Notes
VREF
Input reference voltage
0.5 * VDDQ
V
1
VSWING(MAX)
Input signal maximum peak to peak swing
1.0 V
1
SLEW
Input signal minimum slew rate
1.0
V/ns
2, 3
Note :
1. Input waveform timing is referenced to the input signal crossing through the VIH/IL(AC) level applied to the device under test.
2. The input signal minimum slew rate is to be maintained over the range from VREF to VIH(AC) min for rising edges and the range from VREF to
VIL(AC) max for falling edges as shown in the below figure.
3. AC timings are referenced with input waveforms switching from VIL(AC) to VIH(AC) on the positive transitions and VIH(AC) to VIL(AC) on the
negative transitions.
VSWING(MAX)
delta TF
delta TR
Falling Slew =
VREF - VIL(AC) max
delta TF
Rising Slew =
< AC Input Test Signal Waveform >
VDDQ
VIH(AC) min
VIH(DC) min
VREF
VIL(DC) max
VIL(AC) max
VSS
VIH(AC) min - VREF
delta TR
11 of 26
Rev. 1.1 June 2007
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet K4T1G084QC.PDF ] | |
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