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PDF BUK210-50Y Data sheet ( Hoja de datos )

Número de pieza BUK210-50Y
Descripción PowerMOS transistor TOPFET high side switch
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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No Preview Available ! BUK210-50Y Hoja de datos, Descripción, Manual

Philips Semiconductors
PowerMOS transistor
TOPFET high side switch
Product specification
BUK210-50Y
DESCRIPTION
Monolithic single channel high side
protected power switch in
TOPFET2 technology assembled in
a 5 pin plastic package.
APPLICATIONS
General controller for driving
lamps, motors, solenoids, heaters.
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FEATURES
Vertical power TrenchMOS
Low on-state resistance
CMOS logic compatible
Very low quiescent current
Overtemperature protection
Load current limiting
Latched overload and
short circuit protection
Overvoltage and undervoltage
shutdown with hysteresis
On-state open circuit load
detection
Diagnostic status indication
Voltage clamping for turn off
of inductive loads
ESD protection on all pins
Reverse battery, overvoltage
and transient protection
QUICK REFERENCE DATA
SYMBOL PARAMETER
IL Nominal load current (ISO)
SYMBOL
VBG
IL
Tj
RON
PARAMETER
Continuous off-state supply voltage
Continuous load current
Continuous junction temperature
On-state resistance
Tj = 25˚C
FUNCTIONAL BLOCK DIAGRAM
STATUS
INPUT
GROUND
CONTROL &
PROTECTION
CIRCUITS
RG
MIN.
9
UNIT
A
MAX.
50
20
150
38
UNIT
V
A
˚C
m
BATT
POWER
MOSFET
LOAD
PINNING - SOT263B-01
PIN DESCRIPTION
1 Input
2 Flag
3 Drain
4 Protection supply
5 Source
tab Drain
Fig.1. Elements of the TOPFET HSS with internal ground resistor.
PIN CONFIGURATION
SYMBOL
mb mb
12345
Front view
Fig. 2.
MBL267
TOPFET
P
FP
I
D
S
Fig. 3.
November 2002
1
Rev 2.000

1 page




BUK210-50Y pdf
Philips Semiconductors
PowerMOS transistor
TOPFET high side switch
Product specification
BUK210-50Y
UNDERVOLTAGE & OVERVOLTAGE CHARACTERISTICS
Limits are at -40˚C Tmb 150˚C and typicals at Tmb = 25 ˚C. Refer to TRUTH TABLE.
SYMBOL PARAMETER
CONDITIONS
MIN.
Undervoltage
TYP.
MAX. UNIT
VBG(UV)
VBG(UV)
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Low supply threshold voltage1
Hysteresis
Overvoltage
2 4.2 5.5 V
- 0.5 -
V
VBG(OV)
VBG(OV)
High supply threshold voltage2
Hysteresis
40 45 50
-1-
V
V
TRUTH TABLE
INPUT
L
H
H
H
H
H
H
ABNORMAL CONDITIONS
DETECTED
SUPPLY
LOAD
UV OV LC SC OT
X X XXX
0 0 000
0 0 100
1 0 XXX
0 1 X00
0 0 01X
0 0 001
LOAD
OUTPUT STATUS
DESCRIPTION
OFF
ON
ON
OFF
OFF
OFF
OFF
H off
H on & normal
L on & low current detect
H supply undervoltage lockout
H supply overvoltage shutdown
L SC tripped
L OT shutdown3
KEY TO ABBREVIATIONS
L logic low
H logic high
X dont care
0 condition not present
1 condition present
UV undervoltage
OV overvoltage
LC low current or open circuit load
SC short circuit
OT overtemperature
1 Undervoltage sensor causes the device to switch off and reset.
2 Overvoltage sensor causes the device to switch off to protect its load.
3 The status will continue to indicate OT (even if the input goes low) until the device cools below the reset threshold. Refer to OVERLOAD
PROTECTION CHARACTERISTICS.
November 2002
5
Rev 2.000

5 Page





BUK210-50Y arduino
Philips Semiconductors
PowerMOS transistor
TOPFET high side switch
Product specification
BUK210-50Y
35 VBL(TO) / V
30
BUK215-50Y
max.
25 typ. 25˚C
20
min.
15
10
www.DataSheet4U.com
5
0
0 10 20 30 40 50
VBG/ V
Fig.28. Short circuit load threshold voltage.
VBL(TO) = f(VBG); conditions -40˚C Tmb 150˚C
10 nF CBL
BUK210-50Y
1nF
100pF
0 10 20 30 40 50
VBL / V
Fig.29. Typical output capacitance. Tmb = 25 ˚C
Cbl = f(VBL); conditions f = 1 MHz, VIG = 0 V
0 IG / mA
BUK210-50Y
-50
-100
-150
-200
-20 -15 -10
-5
VBG / V
0
Fig.30. Typical reverse battery characteristic.
IG = f(VBG); conditions IL = 0 A, Tj = 25 ˚C
IL(lim) / A
50
BUK210-50Y
45
40
35
30
-50 0 50 Tj / OC 100 150 200
Fig.31. Typical overload current, VBL = 8V.
IL = f(Tj); parameter VBG = 13V;tp = 300 µs
VBL(TO) / V
12.0
BUK210-50Y
11.8
11.6
11.4
11.2
11.0
10.8
10.6
10.4
10.2
10.0
-50 0 50 100 150 200
Tj / OC
Fig.32. Typical short circuit load threshold voltage.
VBL(TO) = f(Tj); condition VBG = 16 V
1e+01
Zth j-mb ( K / W )
BUK210-50Y
1e+00
1e-01
D=
0.5
0.2
0.1
0.05
0.02
1e-02
0
PD tp
D=
tp
T
1e-03
1e-07
1e-05
1e-03
t/s
T
1e-01
t
Fig.33. Transient thermal impedance.
Zth j-mb = f(t); parameter D = tp/T
1e+02
November 2002
11
Rev 2.000

11 Page







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