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PDF iT4033D Data sheet ( Hoja de datos )
| Número de pieza | iT4033D | |
| Descripción | 100-ps dual independent wideband phase delay | |
| Fabricantes | Iterra | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de iT4033D (archivo pdf) en la parte inferior de esta página. Total 5 Páginas | ||
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Description
www.DataSheet4U.com
Features
iT4033D
100-ps Dual Independent
Wideband Phase Delay
(Advanced Information)
The iT4033D is a dual-independent ultra-wideband phase delay fabricated using 1-um HBT GaAs
technology and is based on ECL topology to guarantee high-speed operation. The high output
voltage, excellent rise and fall time, and the high eye diagram quality at data rates to 12.5 Gb/s
makes the iT4033D suitable for timing adjustment in data and clock distribution at very high speed.
Complex digital applications benefit from the iT4033D, including clock data recovery, edge
detectors, NRZ-to-RZ converters, MUX/DEMUX, and data restoration. The device features a dual
delay element that provides up to 100-ps delay. Delay control can be either differential (using both
VCp and VCm) or single-ended (VCm is the active control pad while VCp is shorted to VCref). The
control voltage range for the delay input is from -2.2 V to -3.0 V whether the control is single-ended
or differential. The device can delay NRZ streams with data rates to 12.5 Gb/s or a clock signal up
to 10.7 GHz. Both inputs and outputs are DC-coupled. At the input side, internal 50-ohm resistors
avoid the need for external impedance matching terminations. The iT4033D uses SCFL I/O levels
and is designed so to allow for either single ended or differential data input.
Ultra wideband: Up to 12.5 Gb/s NRZ
Dual independent cores on a single die
Delay adjustment to 100 ps
900 mVpp single-ended output
Jitter RMS: <1.5 ps
Output rise time (20% – 80 %): <21 ps
Output fall time (20% – 80 %): <18 ps
50-ohm matched DC-coupled inputs and outputs
Differential or single ended I/O
Power consumption: 1.6 W (each core)
Device
Diagram
www.iterrac.com
This is an Advanced data sheet. See “Product Status Definitions”
on Web site or catalog for product development status.
October 5, 2005 Doc. 4037 Rev 0
1
iTerra Communications
2400 Geng Road, Ste. 100, Palo Alto, CA 94303
Phone (650) 424-1937, Fax (650) 424-1938
1 page  
Recommended
Chip Mounting
Chip size:
2650 μm ±10 μm
x 2650 μm ±10 μm
www.DataSheet4C1U0h4.icpoμtmmhic±k3neμsms:
Pad size: 100 μm
x 100 μm
RF pad pitch: 150 μm
iT4033D
100-ps Dual Independent
Wideband Phase Delay
(Advanced Information)
Pad Positions
and Chip
Dimensions
Chip size:
2650 μm ±10 μm
x 2650 μm ±10 μm
Chip thickness:
104 μm ±3 μm
Pad size: 100 μm
x 100 μm
RF pad pitch: 150 μm
www.iterrac.com
This is an Advanced data sheet. See “Product Status Definitions”
on Web site or catalog for product development status.
October 5, 2005 Doc. 4037 Rev 0
5
iTerra Communications
2400 Geng Road, Ste. 100, Palo Alto, CA 94303
Phone (650) 424-1937, Fax (650) 424-1938
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet iT4033D.PDF ] | |
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