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PDF W72M64VK-XBX Data sheet ( Hoja de datos )
| Número de pieza | W72M64VK-XBX | |
| Descripción | 2Mx64 3.3V Simultaneous Operation Flash Multi-Chip Package | |
| Fabricantes | White Electronic Designs | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de W72M64VK-XBX (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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White Electronic Designs
W72M64VK-XBX
2Mx64 3.3V Simultaneous Operation Flash Multi-Chip Package
FEATURES
Access Times of 90, 100, 120ns
Packaging
• 159 PBGA, 13x22mm - 1.27mm pitch
1,000,000 Erase/Program Cycles
Sector Architecture
• Bank 1 (4Mb): eight 4K word, eight 32K word
www.DataSh•eeBt4aUn.kco2m(12Mb): twenty-four 32K word
• Bank 3 (12Mb): twenty-four 32K word
• Bank 4 (4Mb): eight 32K word
Bottom boot block
Zero Power Operation
Organized as 2Mx64 or 2x2Mx32
Commercial, Industrial and Military Temperature
Ranges
3.3 Volt for Read and Write Operations
Simultaneous Read/Write Operation:
• Data can be continuously read from one bank
while executing erase/program functions in
another bank
• Zero latency between read and write operations
Erase Suspend/Resume
• Suspends erase operations to allow programming
in same bank
Data# Polling and Toggle Bits
• Provides a software method of detecting the
status of program or erase cycles
Unlock Bypass Program command
• Reduces overall programming time when issuing
multiple program command sequences
Ready/Busy# output (RY/BY#)
• Hardware method for detecting program or erase
cycle completion
Hardware reset pin (RESET#)
• Hardware method of resetting the internal state
machine to the read mode
WP#/ACC input pin
• Write protect (WP#) function allows protection
two outermost boot sectors, regardless of sector
protect status
• Acceleration (ACC) function accelerates program
timing
Sector Protection
• Hardware method of locking a sector, either
in-system or using programming equipment, to
prevent any program or erase operation within
that sector
• Temporary Sector Unprotect allows changing
data in protected sectors in-system
Note: For programming information refer to Flash Programming
W72M64V-XBX Application Note.
This product is subject to change without notice.
April 2005
Rev. 0
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
1 page  
White Electronic Designs
W72M64VK-XBX
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS – WE# CONTROLLED
VCC = 3.3V ± 0.3V, -55°C ≤ TA ≤ +125°C
Parameter
Write Cycle Time (3)
Chip Select Setup Time (3)
Write Enable Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Write Enable Pulse Width High (3)
www.DatDauSrahteioento4fUB.ycteomProgramming Operation (1)
Sector Erase (2)
Read Recovery Time before Write (3)
VCC Setup Time
Chip Programming Time (4)
Address Setup Time to OE# low during toggle
bit polling
Write Recovery Time from RY/BY# (3)
Program/Erase Valid to RY/BY#
Symbol
tAVAV
tELWL
tWLWH
tAVWL
tDVWH
tWHDX
tWLAX
tWHWL
tWHWH1
tWHWH2
tGHWL
tVCS
tWC
tCS
tWP
tAS
tDS
tDH
tAH
tWPH
tASO
tRB
tBUSY
-90
Min Max
90
0
35
0
45
0
45
30
300
5
0
50
42
15
0
90
-100
Min Max
100
0
50
0
50
0
50
30
300
5
0
50
42
15
0
90
-120
Min Max
120
0
50
0
50
0
50
30
300
5
0
50
42
15
0
90
Unit
ns
ns
ns
ns
ns
ns
ns
ns
µs
sec
ns
µs
sec
ns
ns
ns
NOTES:
1. Typical value for tWHWH1 is 7µs.
2. Typical value for tWHWH2 is 0.4 sec.
3. Guaranteed by design, but not tested.
4. Typical value is 36 sec. The typical chip programming time is considerably less than the maximum chip
programming time listed, since most bytes program faster than the maximum program times listed.
AC CHARACTERISTICS – READ-ONLY OPERATIONS
VCC = 3.3V ± 0.3V, -55°C ≤ TA ≤ +125°C
Parameter
Read Cycle Time (1)
Symbol
tAVAV
tRC
-90
Min Max
90
-100
Min Max
100
Address Access Time
tAVQV
tACC
90
100
Chip Select Access Time
tELQV
tCE
90
100
Output Enable to Output Valid
tGLQV
tOE
40
40
Chip Select High to Output High Z
tEHQZ
tDF
20
20
Output Enable High to Output High Z
tGHQZ
tDF
20
20
Output Hold from Addresses, CS# or OE#
Change, Whichever occurs first
tAXQX
tOH
0
0
Output Enable Hold Time (1) Read
tOEH 0
0
Toggle and
Data# Polling
10 10
1. Guaranteed by design, not tested.
-120
Min Max
120
120
120
50
20
20
0
0
10
Unit
ns
ns
ns
ns
ns
ns
ns
April 2005
Rev. 0
5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
5 Page 
White Electronic Designs
W72M64VK-XBX
FIGURE 11: TOGGLE BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
Addresses
CS#
WE#
www.DataSheet4U.com
tOEH
OE#
DQ6/DQ2
tDH
Valid Data
RY/BY#
tAHT
tAS
tASO
tAHT
tCEPH
tOEPH
Valid
Status
(First Read)
tOE
Valid
Status
(Second Read)
Valid
Status
(Stops Toggling)
Valid
Data
NOTE: VA = Valid address, not required for DQ6. Illustration shows first two status cycle after command sequence, last status read cycle, and array data read cycle.
FIGURE 12: DQ2 Vs. DQ6
WE#
DQ6
Enter
Embedded
Erasing
Erase
Suspend
Enter Erase
Suspend Program
Erase
Erase Suspend
Read
Erase
Suspend
Program
Erase
Resume
Erase Suspend Erase
Read
Erase
Complete
DQ2
NOTE: DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CS# to toggle DQ2 and DQ6.
April 2005
Rev. 0
11 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet W72M64VK-XBX.PDF ] | |
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