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ARM9TDMI PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 ARM9TDMI
기능 Technical Reference Manual
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ARM9TDMI 데이터시트, 핀배열, 회로
www.DataSheet4U.com
ARM9TDMI
(Rev 3)
Technical Reference Manual
Copyright © 2000 ARM Limited. All rights reserved.
ARM DDI 0180A




ARM9TDMI pdf, 반도체, 판매, 대치품
Contents
Chapter 4
Chapter 5
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Chapter 6
Chapter 7
Chapter 8
Appendix A
ARM9TDMI Coprocessor Interface
4.1 About the coprocessor interface ................................................................. 4-2
4.2 LDC/STC .................................................................................................... 4-3
4.3 MCR/MRC .................................................................................................. 4-9
4.4 Interlocked MCR ....................................................................................... 4-11
4.5 CDP .......................................................................................................... 4-13
4.6 Privileged instructions ............................................................................... 4-15
4.7 Busy-waiting and interrupts ...................................................................... 4-17
4.8 Coprocessor 15 MCRs ............................................................................. 4-19
Debug Support
5.1 About debug ............................................................................................... 5-2
5.2 Debug systems ........................................................................................... 5-3
5.3 Debug interface signals .............................................................................. 5-5
5.4 Scan chains and JTAG interface .............................................................. 5-11
5.5 The JTAG state machine .......................................................................... 5-12
5.6 Test data registers .................................................................................... 5-18
5.7 ARM9TDMI core clocks ............................................................................ 5-24
5.8 Clock switching during debug ................................................................... 5-25
5.9 Clock switching during test ....................................................................... 5-26
5.10 Determining the core state and system state ........................................... 5-27
5.11 Exit from debug state ................................................................................ 5-30
5.12 The behavior of the program counter during debug ................................. 5-33
5.13 EmbeddedICE macrocell .......................................................................... 5-36
5.14 Vector catching ......................................................................................... 5-45
5.15 Single stepping ......................................................................................... 5-46
5.16 Debug communications channel .............................................................. 5-47
Test Issues
6.1 About testing ............................................................................................... 6-2
6.2 Scan chain 0 bit order ................................................................................. 6-3
Instruction Cycle Summary and Interlocks
7.1 Instruction cycle times ................................................................................ 7-2
7.2 Interlocks .................................................................................................... 7-5
ARM9TDMI AC Characteristics
8.1 ARM9TDMI timing diagrams ...................................................................... 8-2
8.2 ARM9TDMI timing parameters ................................................................. 8-14
ARM9TDMI Signal Descriptions
A.1 Instruction memory interface signals .......................................................... A-2
A.2 Data memory interface signals ................................................................... A-3
A.3 Coprocessor interface signals .................................................................... A-5
A.4 JTAG and TAP controller signals ............................................................... A-6
A.5 Debug signals ............................................................................................. A-8
iv
Copyright © 2000 ARM Limited. All rights reserved.
ARM DDI 0180A

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ARM9TDMI 전자부품, 판매, 대치품
List of Tables
ARM9TDMI Technical Reference Manual
www.DataSheet4U.com
Table 2-1
Table 3-1
Table 3-2
Table 3-3
Table 3-4
Table 3-5
Table 3-6
Table 4-1
Table 5-1
Table 5-2
Table 5-3
Table 5-4
Table 5-5
Table 5-6
Table 6-1
Table 7-1
Table 7-2
Table 7-3
Table 8-1
Table A-1
Table A-2
Table A-3
ARM DDI 0180A
Change History ............................................................................................................. ii
ARM9TDMI implementation option ........................................................................... 2-2
InMREQ and ISEQ encoding .................................................................................... 3-5
Endian effect on instruction position ......................................................................... 3-7
DnMREQ and DSEQ encoding ................................................................................. 3-8
DMAS[1:0] encoding ................................................................................................. 3-9
Endian effects for 16-bit data fetches ...................................................................... 3-12
Endian effects for 8-bit data fetches ........................................................................ 3-12
Handshake signals .................................................................................................... 4-7
Public instructions ................................................................................................... 5-13
ID code register ....................................................................................................... 5-19
Scan chain number allocation ................................................................................. 5-20
ARM9TDMI EmbeddedICE macrocell register map ................................................ 5-36
Watchpoint control register for data comparison bit functions ................................. 5-39
Watchpoint control register for instruction comparison bit functions ....................... 5-41
Scan chain 0 bit order ............................................................................................... 6-3
Symbols used in tables ............................................................................................. 7-2
Instruction cycle bus times ........................................................................................ 7-2
Data bus instruction times ......................................................................................... 7-4
ARM9TDMI timing parameters ................................................................................ 8-14
Instruction memory interface signals ......................................................................... A-2
Data memory interface signals .................................................................................. A-3
Coprocessor interface signals ................................................................................... A-5
Copyright © 2000 ARM Limited. All rights reserved.
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