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PDF IXDD430 Data sheet ( Hoja de datos )
| Número de pieza | IXDD430 | |
| Descripción | (IXDx430) 30 Amp Low-Side Ultrafast MOSFET / IGBT Driver | |
| Fabricantes | IXYS Corporation | |
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IXDN430 / IXDI430 / IXDD430 / IXDS430
30 Amp Low-Side Ultrafast MOSFET / IGBT Driver
Features
• Built using the advantages and compatibility
of CMOS and IXYS HDMOSTM processes
• Latch-Up Protected
• High Peak Output Current: 30A Peak
• Wide Operating Range: 8.5V to 35V
• Under Voltage Lockout Protection
• Ability to Disable Output under Faults
• High Capacitive Load
Drive Capability: 5600 pF in <25ns
www.DataSh•eeMt4aUt.cchomed Rise And Fall Times
• Low Propagation Delay Time
• Low Output Impedance
• Low Supply Current
Applications
• Driving MOSFETs and IGBTs
• Motor Controls
• Line Drivers
• Pulse Generators
• Local Power ON / OFF Switch
• Switch Mode Power Supplies (SMPS)
• DC to DC Converters
• Pulse Transformer Driver
• Limiting di/dt Under Short Circuit
• Class D Switching Amplifiers
General Description
The IXDN430/IXDI430/IXDD430/IXDS430 are high speed high
current gate drivers specifically designed to drive MOSFETs
and IGBTs to their minimum switching time and maximum
practical frequency limits. The IXD_430 can source and sink
30A of peak current while producing voltage rise and fall times
of less than 30ns. The input of the drivers are compatible with
TTL or CMOS and are fully immune to latch up over the entire
operating range. Designed with small internal delays, cross
conduction/current shoot-through is virtually eliminated in all
configurations. Their features and wide safety margin in
operating voltage and power make the drivers unmatched in
performance and value.
The IXD_430 incorporates a unique ability to disable the output
under fault conditions. The standard undervoltage lockout is at
12.5V which can also be set to 8.5V in the IXDS430SI. When a
logical low is forced into the Enable inputs, both final output
stage MOSFETs (NMOS and PMOS) are turned off. As a
result, the output of the IXDD430 enters a tristate mode and
enables a Soft Turn-Off of the MOSFET when a short circuit is
detected. This helps prevent damage that could occur to the
MOSFET if it were to be switched off abruptly due to a dv/dt
over-voltage transient.
The IXDN430 is configured as a noninverting gate driver, and the
IXDI430 is an inverting gate driver. The IXDS430 can be configured
either as a noninverting or inverting driver. The IXD_430 are available
in the standard 28-pin SIOC (SI-CT), 5-pin TO-220 (CI), and in the
TO-263 (YI) surface mount packages. CT or 'Cool Tab' for the 28-
pin SOIC package refers to the backside metal heatsink tab.
Ordering Information
Part Num ber
Package Type
IX D D 4 3 0 Y I
5-pin TO -263
IX D D 4 3 0 C I
5-pin TO -220
IX D I4 3 0 Y I
5-pin TO -263
IX D I4 3 0 C I
5-pin TO -220
IX D N 4 3 0 Y I
5-pin TO -263
IX D N 4 3 0 C I
5-pin TO -220
IX D S 4 3 0 S I
28-pin S O IC
Temp. Range
-55°C to +125°
C o n fig u ra tio n
N on Inverting with
E nable
-55°C to +125°
In v e rtin g
-55°C to +125°
N on Inverting
-55°C to +125°
Inverting / N on
Inverting w ith E nable
and UVSEL
Copyright © IXYS CORPORATION 2004
First Release
DS99045B(8/04)
1 page  
Pin Configurations
www.DataSheet4U.com
Vcc 1
Vcc 2
Vcc 3
Vcc 4
N/C 5
UVSEL 6
N/C 7
IN 8
EN 9
INV 10
GND 11
GND 12
GND 13
GND 14
28 Pin SOIC
(SI-CT)
IXDN430 / IXDI430 / IXDD430 / IXDS430
28 Vcc
27 Vcc
26 Vcc
25 Vcc
24 OUT P
23 OUT P
22 OUT P
21 OUT N
20 OUT N
19 OUT N
18 GND
17 GND
16 GND
15 GND
1 Vcc
2 OUT
3 GND
4 IN
5 EN*
TO220 (CI)
TO263 (YI)
Pin Description
SYMBOL
VCC
IN
EN *
INV
OUT P
OUT N
GND
UVSEL
FUNCTION
Supply Voltage
Input
Enable
Invert
Output
Ground
Select Under
Voltage Level
DESCRIPTION
Positive power-supply voltage input. This pin provides power to the
entire chip. The range for this voltage is from 8.5V to 35V.
Input signal-TTL or CMOS compatible.
The system enable pin. This pin, when driven low, disables the chip,
forcing high impedance state to the output (IXDD430 Only).
Forcing INV low causes the IXDS430 to become non-inverted, while
forcing INV high causes the IXDS430 to become inverted.
Respective P and N driver outputs. For application purposes this pin
is connected, through a resistor, to Gate of a MOSFET/IGBT. The P
and N output pins are connected together in the TO-263 and TO-220
packages.
The system ground pin. Internally connected to all circuitry, this pin
provides ground reference for the entire chip. This pin should be
connected to a low noise analog ground plane for optimum
perform ance.
W ith UVSEL connected to Vcc, IXDS430 outputs go low at Vcc <
8.5V; W ith UVSEL open, under voltage level is set at Vcc < 12.5V
* This pin is used only on the IXDD430, and is N/C (not connected) on the IXDI430 and IXDN430.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD procedures when
handling and assembling this component.
Figure 2 - Characteristics Test Diagram
C
BYPASS/
FILTER
.+ Vcc
-
CLOAD
.
+
Vin
-
Vcc
OUT
GND IXDD430
IN
EN
5
5 Page 
APPLICATIONS INFORMATION
Short Circuit di/dt Limit
A short circuit in a high-power MOSFET module such as the
VM0580-02F, (580A, 200V), as shown in Figure 27, can cause
the current through the module to flow in excess of 1500A for
10µs or more prior to self-destruction due to thermal runaway.
For this reason, some protection circuitry is needed to turn off
the MOSFET module. However, if the module is switched off
too fast, there is a danger of voltage transients occuring on the
drain due to Ldi/dt, (where L represents total inductance in
series with drain). If these voltage transients exceed the
MOSFET's voltage rating, this can cause an avalanche break-
down.
The IXDD430 has the unique capability to softly switch off the
www.DataShheiegth4U-p.coowmer MOSFET module, significantly reducing these
Ldi/dt transients.
Thus, the IXDD430 helps to prevent device destruction from
both dangers; over-current, and avalanche breakdown due to
di/dt induced over-voltage transients.
The IXDD430 is designed to not only provide ±30A under
normal conditions, but also to allow it's output to go into a high
impedance state. This permits the IXDD430 output to control
a separate weak pull-down circuit during detected overcurrent
shutdown conditions to limit and
turnoff. This circuit is shown in
separately
Figure 28.
control
dVGS/dt
gate
Referring to Figure 28, the protection circuitry should include
a comparator, whose positive input is connected to the source
of the VM0580-02. A low pass filter should be added to the input
of the comparator to eliminate any glitches in voltage caused
by the inductance of the wire connecting the source resistor to
ground. (Those glitches might cause false triggering of the
comparator).
The comparator's output should be connected to a SRFF(Set
Reset Flip Flop). The flip-flop controls both the Enable signal,
and the low power MOSFET gate. Please note that CMOS
4000-series devices operate with a VCC range from 3 to 15 VDC,
(with 18 VDC being the maximum allowable limit).
A low power MOSFET, such as the 2N7000, in series with a
resistor, will enable the VMO580-02F gate voltage to drop
gradually. The resistor should be chosen so that the RC time
constant will be 100us, where "C" is the Miller capacitance of
the VMO580-02F.
For resuming normal operation, a Reset signal is needed at
the SRFF's input to enable the IXDD430 again. This Reset can
be generated by connecting a One Shot circuit between the
IXDD430 Input signal and the SRFF restart input. The One Shot
will create a pulse on the rise of the IXDD430 input, and this
pulse will reset the SRFF outputs to normal operation.
When a short circuit occurs, the voltage drop across the low-
value, current-sensing resistor, (Rs=0.005 Ohm), connected
between the MOSFET Source and ground, increases. This
triggers the comparator at a preset level. The SRFF drives a
low input into the Enable pin disabling the IXDD430 output. The
SRFF also turns on the low power MOSFET, (2N7000).
IXDN430 / IXDI430 / IXDD430 / IXDS430
In this way, the high-power MOSFET module is softly turned off
by the IXDD430, preventing its destruction.
Supply Bypassing and Grounding Practices,
Output Lead inductance
When designing a circuit to drive a high speed MOSFET
utilizing the IXDD430/IXDI430/IXDN430, it is very important to
keep certain design criteria in mind, in order to optimize
performance of the driver. Particular attention needs to be paid
to Supply Bypassing, Grounding, and minimizing the Output
Lead Inductance.
Say, for example, we are using the IXDD430 to charge a 15nF
capacitive load from 0 to 25 volts in 25ns.
Using the formula: I= C ∆V / ∆t, where ∆V=25V C=15nF &
∆t=25ns we can determine that to charge 15nF to 25 volts in
25ns will take a constant current of 15A. (In reality, the charging
current won’t be constant, and will peak somewhere around
30A).
SUPPLY BYPASSING
In order for our design to turn the load on properly, the IXDD430
must be able to draw this 5A of current from the power supply
in the 25ns. This means that there must be very low impedance
between the driver and the power supply. The most common
method of achieving this low impedance is to bypass the power
supply at the driver with a capacitance value that is a magnitude
larger than the load capacitance. Usually, this would be
achieved by placing two different types of bypassing capacitors,
with complementary impedance curves, very close to the driver
itself. (These capacitors should be carefully selected, low
inductance, low resistance, high-pulse current-service
capacitors). Lead lengths may radiate at high frequency due
to inductance, so care should be taken to keep the lengths of
the leads between these bypass capacitors and the IXDD430
to an absolute minimum.
GROUNDING
In order for the design to turn the load off properly, the IXDD430
must be able to drain this 5A of current into an adequate
grounding system. There are three paths for returning current
that need to be considered: Path #1 is between the IXDD430
and it’s load. Path #2 is between the IXDD430 and it’s power
supply. Path #3 is between the IXDD430 and whatever logic is
driving it. All three of these paths should be as low in resistance
and inductance as possible, and thus as short as practical. In
addition, every effort should be made to keep these three
ground paths distinctly separate. Otherwise, (for instance), the
returning ground current from the load may develop a voltage
that would have a detrimental effect on the logic line driving the
IXDD430.
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet IXDD430.PDF ] | |
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