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ATXMEGA128A4 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 ATXMEGA128A4
기능 (ATXMEGAxxxA4) 8/16-bit XMEGA A1 Microcontroller
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ATXMEGA128A4 데이터시트, 핀배열, 회로
Features
High-performance, Low-power AVR 8/16-bit AVR XMEGA Microcontroller
Non-volatile Program and Data Memories
– 16K - 128K Bytes of In-System Self-Programmable Flash
– 4K Boot Code Section with Independent Lock Bits
– 1K - 2K Bytes EEPROM
– 2K - 8K Bytes Internal SRAM
Peripheral Features
– Four-channel DMA Controller with support for external requests
– Eight-channel Event System
– Five 16-bit Timer/Counters
Three Timer/Counters with 4 Output Compare or Input Capture channels
www.DataSheet4U.cTowmo Timer/Counters with 2 Output Compare or Input Capture channels
High-Resolution Extensions on all Timer/Counters
Advanced Waveform Extension on one Timer/Counter
– Five USARTs
IrDA Extension on one USART
– Two Two-Wire Interfaces with dual address match (I2C and SMBus compatible)
– Two SPIs (Serial Peripheral Interfaces) peripherals
– AES and DES Crypto Engine
– 16-bit Real Time Counter with Separate Oscillator
– One Twelve-channel, 12-bit, 2 Msps Analog to Digital Converter
– One Two-channel, 12-bit, 1 Msps Digital to Analog Converter
– Two Analog Comparators with Window compare function
– External Interrupts on all General Purpose I/O pins
– Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal and External Clock Options with PLL
– Programmable Multi-level Interrupt Controller
– Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby
– Advanced Programming, Test and Debugging Interfaces
PDI (Program and Debug Interface) for programming, test and debugging
I/O and Packages
– 34 Programmable I/O Lines
– 44-lead TQFP
– 44-pad MLF
Operating Voltage
– 1.6 – 3.6V
Speed performance
– 0 – 12 MHz @ 1.6 – 2.7V
– 0 – 32 MHz @ 2.7 – 3.6V
8/16-bit
XMEGA A4
Microcontroller
ATxmega128A4
ATxmega64A4
ATxmega32A4
ATxmega16A4
Preliminary
Typical Applications
Industrial control
Factory automation
Building control
Climate control
ZigBee
Motor control
Board control
Networking
White Goods
Optical
Hand-held battery applications
Power tools
HVAC
Metering
Medical Applications
8069D–AVR–08/08




ATXMEGA128A4 pdf, 반도체, 판매, 대치품
XMEGA A4
3.1 Block Diagram
Figure 3-1. XMEGA A4 Block Diagram
PR[0..1]
XTAL1/
TOSC1
XTAL2/
TOSC2
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PA[0..7]
PB[0..3]
PORT A (8)
ACA
ADCA
AREFA
Internal
Reference
AREFB
PORT B (4)
DACB
Event System
Controller
DMA
Controller
BUS
Controller
Oscillator
Circuits/
Clock
Generation
Real Time
Counter
DATA BUS
SRAM
Oscillator
Control
Sleep
Controller
Prog/Debug
Controller
Watchdog
Oscillator
Watchdog
Timer
Power
Supervision
POR/BOD &
RESET
PDI
DES
AES
CPU
OCD
Interrupt
Controller
NVM Controller
Flash
EEPROM
TWIE
USARTE0
TCE0
VCC
GND
RESET/
PDI_CLK
PDI_DATA
PE[0..3]
IRCOM
DATA BUS
EVENT ROUTING NETWORK
8069D–AVR–08/08
PORT C (8)
PC[0..7]
PORT D (8)
PD[0..7]
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ATXMEGA128A4 전자부품, 판매, 대치품
XMEGA A4
concept enables instructions to be executed in every clock cycle. The program memory is In-
System Re-programmable Flash memory.
6.3 Register File
The fast-access Register File contains 32 x 8-bit general purpose working registers with single
clock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU) operation. In a typ-
ical ALU cycle, the operation is performed on two Register File operands, and the result is stored
back in the Register File.
Six of the 32 registers can be used as three 16-bit address register pointers for data space
addressing - enabling efficient address calculations. One of these address pointers can also be
used as an address pointer for look up tables in Flash program memory.
www.Data6Sh.4eet4U.cAomLU - Arithmetic Logic Unit
The high performance Arithmetic Logic Unit (ALU) supports arithmetic and logic operations
between registers or between a constant and a register. Single register operations can also be
executed. Within a single clock cycle, arithmetic operations between general purpose registers
or between a register and an immediate are executed. After an arithmetic or logic operation, the
Status Register is updated to reflect information about the result of the operation.
The ALU operations are divided into three main categories – arithmetic, logical, and bit-func-
tions. Both 8- and 16-bit arithmetic is supported, and the instruction set allows for efficient
implementation of 32-bit arithmetic. The ALU also provides a powerful multiplier supporting both
signed and unsigned multiplication and fractional format.
6.5 Program Flow
When the device is powered on, the CPU starts to execute instructions from the lowest address
in the Flash Program Memory ‘0’. The Program Counter (PC) addresses the next instruction to
be fetched. After a reset, the PC is set to location ‘0’.
Program flow is provided by conditional and unconditional jump and call instructions, capable of
addressing the whole address space directly. Most AVR instructions use a 16-bit word format,
while a limited number uses a 32-bit format.
During interrupts and subroutine calls, the return address PC is stored on the Stack. The Stack
is effectively allocated in the general data SRAM, and consequently the Stack size is only limited
by the total SRAM size and the usage of the SRAM. After reset the Stack Pointer (SP) points to
the highest address in the internal SRAM. The SP is read/write accessible in the I/O memory
space, enabling easy implementation of multiple stacks or stack areas. The data SRAM can
easily be accessed through the five different addressing modes supported in the AVR CPU.
8069D–AVR–08/08
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부품번호상세설명 및 기능제조사
ATxMEGA128A1

(ATxMEGAxxxA1) 8/16-bit XMEGA A1 Microcontroller

ATMEL Corporation
ATMEL Corporation
ATxmega128A1U

8/16-bit Atmel XMEGA A1U Microcontroller

ATMEL
ATMEL

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