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M74C923 데이터시트 PDF




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M74C923 데이터시트, 핀배열, 회로
October 1987
Revised January 1999
www.DataSheet4U.com
MM74C922 • MM74C923
16-Key Encoder • 20-Key Encoder
General Description
The MM74C922 and MM74C923 CMOS key encoders pro-
vide all the necessary logic to fully encode an array of
SPST switches. The keyboard scan can be implemented
by either an external clock or external capacitor. These
encoders also have on-chip pull-up devices which permit
switches with up to 50 kon resistance to be used. No
diodes in the switch array are needed to eliminate ghost
switches. The internal debounce circuit needs only a single
external capacitor and can be defeated by omitting the
capacitor. A Data Available output goes to a high level
when a valid keyboard entry has been made. The Data
Available output returns to a low level when the entered
key is released, even if another key is depressed. The Data
Available will return high to indicate acceptance of the new
key after a normal debounce period; this two-key roll-over
is provided between any two switches.
An internal register remembers the last key pressed even
after the key is released. The 3-STATE outputs provide for
easy expansion and bus operation and are LPTTL compat-
ible.
Features
s 50 kmaximum switch on resistance
s On or off chip clock
s On-chip row pull-up devices
s 2 key roll-over
s Keybounce elimination with single capacitor
s Last key register at outputs
s 3-STATE output LPTTL compatible
s Wide supply range: 3V to 15V
s Low power consumption
Ordering Code:
Order Number Package Number
Package Description
MM74C922N
N18A
18-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
MM74C922WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
MM74C923WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
MM74C923N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignment for DIP
Pin Assignment for SOIC
Top View
MM94C922
© 1999 Fairchild Semiconductor Corporation DS006037.prf
Top View
MM74C922
www.fairchildsemi.com




M74C923 pdf, 반도체, 판매, 대치품
www.DataSheet4U.com
Absolute Maximum Ratings(Note 2)
Voltage at Any Pin
VCC 0.3V to V CC + 0.3V
Operating Temperature Range
MM74C922, MM74C923
40°C to +85°C
Storage Temperature Range
65°C to +150°C
Power Dissipation (P D)
Dual-In-Line
700 mW
Small Outline
500 mW
Operating VCC Range
VCC
Lead Temperature
(Soldering, 10 seconds)
3V to 15V
18V
260°C
Note 2: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Tempera-
ture Range” they are not meant to imply that the devices should be oper-
ated at these limits. The table of “Electrical Characteristics” provides
conditions for actual device operation.
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise specified
Symbol
Parameter
Conditions
CMOS TO CMOS
VT+ Positive-Going Threshold Voltage
at Osc and KBM Inputs
VTNegative-Going Threshold Voltage
at Osc and KBM Inputs
VIN(1)
Logical “1” Input Voltage,
Except Osc and KBM Inputs
VIN(0)
Logical “0” Input Voltage,
Except Osc and KBM Inputs
Irp Row Pull-Up Current at Y1, Y2,
Y3, Y4 and Y5 Inputs
VOUT(1)
Logical “1” Output Voltage
VOUT(0)
Logical “0” Output Voltage
Ron Column “ON” Resistance at
X1, X2, X3 and X4 Outputs
ICC Supply Current
Osc at 0V, (one Y low)
IIN(1)
Logical “1” Input Current
at Output Enable
IIN(0)
Logical “0” Input Current
at Output Enable
CMOS/LPTTL INTERFACE
VIN(1)
VIN(0)
VOUT(1)
Except Osc and KBM Inputs
Except Osc and KBM Inputs
Logical “1” Output Voltage
VOUT(0)
Logical “0” Output Voltage
VCC = 5V, IIN 0.7 mA
VCC = 10V, IIN 1.4 mA
VCC = 15V, IIN 2.1 mA
VCC = 5V, IIN 0.7 mA
VCC = 10V, IIN 1.4 mA
VCC = 15V, IIN 2.1 mA
VCC = 5V
VCC = 10V
VCC = 15V
VCC = 5V
VCC = 10V
VCC = 15V
VCC = 5V, VIN = 0.1 VCC
VCC = 10V
VCC = 15V
VCC = 5V, IO = −10 µA
VCC = 10V, IO = −10 µA
VCC = 15V, IO = −10 µA
VCC = 5V, IO = 10 µA
VCC = 10V, IO = 10 µA
VCC = 15V, IO = 10 µA
VCC = 5V, VO = 0.5V
VCC = 10V, VO = 1V
VCC = 15V, VO = 1.5V
VCC = 5V
VCC = 10V
VCC = 15V
VCC = 15V, VIN = 15V
VCC = 15V, VIN = 0V
VCC = 4.75V
VCC = 4.75V
IO = −360 µA
VCC = 4.75V
IO = −360 µA
IO = −360 µA
VCC = 4.75V
IO = −360 µA
www.fairchildsemi.com
4
Min Typ Max
3.0
6.0
9.0
0.7
1.4
2.1
3.5
8.0
12.5
4.5
9
13.5
1.0
3.6
6.8
10
1.4
3.2
5
4.5
9
13.5
0.5
1
1.5
2
10
22
500
300
200
0.55
1.1
1.7
0.005
0.005
4.3
8.6
12.9
2.0
4.0
6.0
1.5
2
2.5
5
20
45
0.5
1
1.5
1400
700
500
1.1
1.9
2.6
1.0
Units
V
V
V
V
V
V
V
V
V
V
V
V
µA
µA
µA
V
V
V
V
V
V
mA
mA
mA
µA
µA
VCC 1.5
2.4
V
0.8 V
V
0.4 V

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M74C923 전자부품, 판매, 대치품
Typical Performance Characteristics
Typical Irp vs VIN at Any Y Input
Typical Ron vs VOUT at Any X Output
www.DataSheet4U.com
Typical FSCAN vs COSC
Typical Debounce Period vs CKBM
Typical Applications
Synchronous Handshake (MM74C922)
Synchronous Data Entry Onto Bus (MM74C922)
The keyboard may be synchronously scanned by omitting the capacitor at
osc. and driving osc. directly if the system clock rate is lower than 10 kHz
Outputs are enabled when valid entry is made and go into 3-STATE when
key is released.
The keyboard may be synchronously scanned by omitting the capacitor at
osc. and driving osc. directly if the system clock rate is lower than 10 kHz
7 www.fairchildsemi.com

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