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PDF KFG2816Q1M-DEB Data sheet ( Hoja de datos )
| Número de pieza | KFG2816Q1M-DEB | |
| Descripción | (KFG2816Q1M-DEB / KFG2816U1M-DIB) Flash Memory | |
| Fabricantes | Samsung semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de KFG2816Q1M-DEB (archivo pdf) en la parte inferior de esta página. Total 70 Páginas | ||
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OneNAND128
FLASH MEMORY
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OneNAND SPECIFICATION
Product
OneNAND128
Part No.
KFG2816Q1M-DEB
KFG2816U1M-DIB
VCC(core & IO)
1.8V(1.7V~1.95V)
3.3V(2.7V~3.6V)
Temperature
Extended
Industrial
PKG
67FBGA(LF)/48TSOP1
67FBGA(LF)/48TSOP1
Version: Ver. 1.1
Date: Dec. 23, 2005
1
1 page  
OneNAND128
FLASH MEMORY
1. FEATURES
♦ Architecture
• Design Technology: 0.12µm
• Voltage Supply
- 1.8V device(KFG2816Q1M) : 1.7V~1.95V
- 3.3V device(KFG2816U1M) : 2.7V~3.6V
• Organization
- Host Interface:16bit
• Internal BufferRAM(3K Bytes)
- 1KB for BootRAM, 2KB for DataRAM
• NAND Array
- Page Size : (1K+32)bytes
- Block Size : (64K+2K)bytes
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♦ Performance
• Host Interface type
- Synchronous Burst Read
: Clock Frequency: up to 54MHz
: Linear Burst - 4 , 8 , 16 , 32 words with wrap-around
: Continuous Sequential Burst(512 words)
- Asynchronous Random Read
: Access time of 76ns
- Asynchronous Random Write
• Programmable Read latency
• Multiple Sector Read
- Read multiple sectors by Sector Count Register(up to 2 sectors)
• Multiple Reset
- Cold Reset / Warm Reset / Hot Reset / NAND Flash Reset
• Power dissipation (typical values, CL=30pF)
- Standby current : [email protected] device, [email protected] device
- Synchronous Burst Read current(54MHz) : [email protected] device, [email protected] device
- Load current : [email protected] device, [email protected] device
- Program current: [email protected] device, [email protected] device
- Erase current: [email protected] device, [email protected] device
• Reliable CMOS Floating-Gate Technology
- Endurance : 100K Program/Erase Cycles
- Data Retention : 10 Years
♦ Hardware Features
• Voltage detector generating internal reset signal from Vcc
• Hardware reset input (RP)
• Data Protection
- Write Protection mode for BootRAM
- Write Protection mode for NAND Flash Array
- Write protection during power-up
- Write protection during power-down
• User-controlled One Time Programmable(OTP) area
• Internal 2bit EDC / 1bit ECC
• Internal Bootloader supports Booting Solution in system
♦ Software Features
• Handshaking Feature
- INT pin: Indicates Ready / Busy of OneNAND
- Polling method: Provides a software method of detecting the Ready / Busy status of OneNAND
• Detailed chip information by ID register
♦ Packaging
• Package
- 67ball, 7mm x 9mm x max 1.0mmt , 0.8mm ball pitch FBGA
- 48 TSOP 1, 12mm x 20mm, 0.5mm pitch
5
5 Page 
OneNAND128
5. BLOCK DIAGRAM
DQ15~DQ0
A15~A0
CLK
CE
OE
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RP
AVD
INT
RDY
BufferRAM
BootRAM
DataRAM
Bootloader
StateMachine
Internal Registers
(Address/Command/Configuration
/Status Registers)
Error
Correction
Logic
- Host Interface
- BufferRAM(BootRAM, DataRAM)
- Command and status registers
- State Machine (Bootloader is included)
- Error Correction Logic
- Memory(NAND Flash Array, OTP)
NOTE:
1) At cold reset, bootloader copies boot code(1K byte size) from NAND Flash Array to BootRAM.
Figure 1. Internal Block Diagram
FLASH MEMORY
NAND Flash
Array
OTP
(One Block)
11
11 Page | ||
| Páginas | Total 70 Páginas | |
| PDF Descargar | [ Datasheet KFG2816Q1M-DEB.PDF ] | |
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