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KFH2G1612M-DEB5 데이터시트 PDF




Samsung semiconductor에서 제조한 전자 부품 KFH2G1612M-DEB5은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 KFH2G1612M-DEB5 기능
기능 FLASH MEMORY
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KFH2G1612M-DEB5 데이터시트, 핀배열, 회로
OneNAND4G(KFW4G16Q2M-DEB5)
OneNAND2G(KFH2G16Q2M-DEB5)
OneNAND1G(KFG1G16Q2M-DEB5)
FLASH MEMORY
www.DataSheet4U.com
OneNANDTM Specification
Density
1Gb
2Gb
4Gb
Part No.
KFG1G16Q2M-DEB5
KFH2G16Q2M-DEB5
KFW4G16Q2M-DEB5
VCC(core & IO)
1.8V(1.7V~1.95V)
1.8V(1.7V~1.95V)
1.8V(1.7V~1.95V)
Temperature
Extended
Extended
Extended
PKG
63FBGA(LF)
63FBGA(LF)
63FBGA(LF)
Version: Ver. 1.1
Date: July 20, 2005
1




KFH2G1612M-DEB5 pdf, 반도체, 판매, 대치품
OneNAND4G(KFW4G16Q2M-DEB5)
OneNAND2G(KFH2G16Q2M-DEB5)
OneNAND1G(KFG1G16Q2M-DEB5)
Revision History
Revision No. History
1.0
www.DataSheet4U.com
1. Corrected the errata
2. Added DFS restriction to Multi Block Erase.
3. Added Data Protection flow chart.
4. Removed Cache Read Operation.
5. Added additional information on command register.
6. Revised Interrupt status register information.
7. Added INT pin schematic.
8. Changed tPGM1 to 205 from 320us, tPGM2 to 220 from 350us.
9. Revised ECC Bypass description
10. Revised AC/DC parameters
11. Revised Reset Parameters and Timing Diagrams.
1.1 1. Corrected the errata
2. Deleted 2.65V/3.3V Device Descriptions.
3. Revised Data Protection Flow Chart.
4. Revised Invalid Block Table Creation Flow Chart.
5. Revised Multi Block Erase Description
FLASH MEMORY
Draft Date
May. 17, 2005
Remark
Final
Jul. 20, 2005
Final
4

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KFH2G1612M-DEB5 전자부품, 판매, 대치품
OneNAND4G(KFW4G16Q2M-DEB5)
OneNAND2G(KFH2G16Q2M-DEB5)
OneNAND1G(KFG1G16Q2M-DEB5)
FLASH MEMORY
1.5 Product Features
Device Architecture
Design Technology:
Supply Voltage:
Host Interface:
5KB Internal BufferRAM:
SLC NAND Array:
90nm
1.8V (1.7V ~ 1.95V)
16 bit
1KB BootRAM, 4KB DataRAM
(2K+64)B Page Size, (128K+4K)B Block Size
Device Performance
Host Interface Type:
www.DataSheet4U.com
Programmable Burst Read Latency:
Multiple Sector Read/Write:
Multiple Reset Modes:
Multi Block Erase:
Low Power Dissipation:
Synchronous Burst Read
- Up to 54MHz clock frequency
- Linear Burst 4-, 8-, 16-, 32-words with wrap around
- Continuous 1K word Sequential Burst
Asynchronous Random Read
- 76ns access time
Asynchronous Random Write
Latency 3(up to 40MHz), 4, 5, 6, and 7
Up to 4 sectors using Sector Count Register
Cold/Warm/Hot/NAND Flash Core Resets
Up to 64 Blocks
Typical Power,
- Standby current :
10uA @ Single , 20uA @ DDP, 40uA @ QDP
- Synchronous Burst Read current(54MHz) :
12mA @ Single, 17mA @ DDP/QDP
- Load current : 30mA
- Program current : 25mA
- Erase current : 20mA
- Multi Block Erase current : 20mA
- Endurance : 100K Program/Erase Cycles
- Data Retention : 10 Years
System Hardware
Voltage detector generating internal reset signal from Vcc
Hardware reset input (RP)
Data Protection Modes
- Write Protection for BootRAM
- Write Protection for NAND Flash Array
- Write Protection during power-up
- Write Protection during power-down
User-controlled One Time Programmable(OTP) area
Internal 2bit EDC / 1bit ECC
Internal Bootloader supports Booting Solution in system
Handshaking Feature
- INT pin indicates Ready / Busy
- Polling the interrupt register status bit
Detailed chip information
- by ID register
Packaging
1G products
2G DDP products
4G QDP products
63ball, 10mm x 13mm x max 1.0mmt, 0.8mm ball pitch FBGA
63ball, 11mm x 13mm x max 1.2mmt, 0.8mm ball pitch FBGA
63ball, 11mm x 13mm x max 1.4mmt, 0.8mm ball pitch FBGA
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부품번호상세설명 및 기능제조사
KFH2G1612M-DEB5

FLASH MEMORY

Samsung semiconductor
Samsung semiconductor

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