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PDF LM2926 Data sheet ( Hoja de datos )
| Número de pieza | LM2926 | |
| Descripción | Low Dropout Regulator with Delayed Reset | |
| Fabricantes | National Semiconductor | |
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April 1998
LM2926/LM2927
Low Dropout Regulator with Delayed Reset
General Description
The LM2926 is a 5V, 500 mA, low dropout regulator with de-
layed reset. The microprocessor reset flag is set low by ther-
mal shutdown, short circuits, overvoltage conditions, drop-
out, and power-up. After the fault condition is corrected, the
reset flag remains low for a delay time determined by the de-
lay capacitor. Hysteresis is included in the reset circuit to
prevent oscillations, and a reset output is guaranteed down
to 3.2V supply input. A latching comparator is used to dis-
charge the delay capacitor, which guarantees a full reset
pulse even when triggered by a relatively short fault condi-
tion. A patented quiescent current reduction circuit drops the
ground pin current to 8 mA at full load when the input-output
differential is 3V or more.
Familiar PNP regulator features such as reverse battery pro-
tection, transient protection, and overvoltage shutdown are
included in the LM2926 making it suitable for use in automo-
tive and battery operated equipment.
The LM2927 is electrically identical to the LM2926 but has a
different pin-out. The LM2927 is pin-for-pin compatible with
the L4947 and TLE4260 alternatives. The LM2926 is
pin-for-pin compatible with the LM2925.
Features
n 5% output accuracy over entire operating range
n Dropout voltage typically 350 mV at 500 mA output
n Externally programmed reset delay
n Short circuit proof
n Reverse battery proof
n Thermally protected
n LM2926 is pin-for-pin compatible with the LM2925
n P+ Product Enhancement tested
Applications
n Battery operated equipment
n Microprocessor-based systems
n Portable instruments
Typical Application
DS010759-1
*Required if regulator is located far (>2") from power supply filter.
**CO must be at least 10 µF to maintain stability. May be increased without bound to maintain regulation during transients. Locate as close as possible to
the regulator. This capacitor msut be rated over the same operating temperature range as the regulator. The equivalent series resistance (ESR) of this
capacitor is critical; see curve under Typical Performance Characteristics.
Connection Diagrams and Ordering Information
5–Lead TO-220
5-Lead TO-220
Front View
Order Number LM2926T
See NS Package Number TO5A
DS010759-2
© 1998 National Semiconductor Corporation DS010759
Front View
Order Number LM2927T
See NS Package Number TO5A
DS010759-14
www.national.com
1 page  
Typical Performance Characteristics (Continued)
Reset Delay
Reset Delay
DS010759-29
Typical Circuit Waveforms
DS010759-30
Applications Information
EXTERNAL CAPACITORS
The LM2926/7 output capacitor is required for stability. With-
out it, the regulator output will oscillate at amplitudes as high
as several volts peak-to-peak at frequencies up to 500 kHz.
Although 10 µF is the minimum recommended value, the ac-
tual size and type may vary depending upon the application
load and temperature range. Capacitor equivalent series re-
sistance (ESR) also affects stability. The region of stable op-
eration is shown in the Typical Performance Characteris-
tics (Output Capacitor ESR curve).
Output capacitors can be increased in size to any desired
value above 10 µF. One possible purpose of this would be to
maintain the output voltage during brief conditions of input
transients that might be characteristic of a particular system.
Capacitors must also be rated at all ambient temperatures
expected in the system. Many aluminum electrolytics freeze
at temperatures below −30˚C, reducing their effective ca-
pacitance to zero. To maintain regulator stability down to
−40˚C, capacitors rated at that temperature (such as tantal-
ums) must be used.
DS010759-5
DELAYED RESET
The delayed reset output is designed to hold a microproces-
sor in a reset state on system power-up for a programmable
time interval to allow the system clock and other powered cir-
cuitry to stabilize. A full reset interval is also generated when-
ever the output voltage falls out of regulation. The circuit is
tripped whenever the output voltage of the regulator is out of
regulation by the Reset Threshold value. This can be caused
by low input voltages, over current conditions, over-voltage
shutdown, thermal shutdown, and by both power-up and
power-down sequences. When the reset circuit detects one
of these conditions, the delay capacitor is discharged by an
SCR and held in a discharged state by a saturated NPN
switch. As long as the delay capacitor is held low, the reset
output is also held low. Because of the action of the SCR, the
reset output cannot glitch on noise or transient fault condi-
tions. A full reset pulse is obtained for any fault condition that
trips the reset circuit.
When the output regains regulation, the SCR is switched off
and a small current (IDELAY = 2 µA) begins charging the de-
5 www.national.com
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| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet LM2926.PDF ] | |
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