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PDF W79E632A Data sheet ( Hoja de datos )
| Número de pieza | W79E632A | |
| Descripción | 8-Bit Microcontroller | |
| Fabricantes | Winbond | |
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W79E632A/W79L632A Data Sheet
8-BIT MICROCONTROLLER
Table of Contents-
1.
2.
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4.
www.DataSheet4U.com
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6.
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8.
9.
10.
11.
12.
13.
14.
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16.
17.
18.
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21.
GENERAL DESCRIPTION .................................................................................................................... 2
FEATURES............................................................................................................................................ 2
PIN CONFIGURATIONS ....................................................................................................................... 3
PIN DESCRIPTION ............................................................................................................................... 4
FUNCTIONAL DESCRIPTION .............................................................................................................. 5
MEMORY ORGANIZATION .................................................................................................................. 7
INSTRUCTION .................................................................................................................................... 26
7.1 Instruction Timing .......................................................................................................... 26
POWER MANAGEMENT..................................................................................................................... 32
INTERRUPTS...................................................................................................................................... 36
PROGRAMMABLE TIMERS/COUNTERS .......................................................................................... 38
10.1 Timer/Counters 0 & 1..................................................................................................... 38
10.2 Timer/Counter 2 ............................................................................................................. 41
10.3 Pulse Width Modulated Outputs (PWM)........................................................................ 45
10.4 Watchdog Timer ............................................................................................................ 48
SERIAL PORT ..................................................................................................................................... 52
11.1 Framing Error Detection ................................................................................................ 57
11.2 Multiprocessor Communications ................................................................................... 57
TIMED ACCESS PROTECTION ......................................................................................................... 59
H/W REBOOT MODE (BOOT FROM 4K BYTES OF LDFLASH) ....................................................... 61
IN-SYSTEM PROGRAMMING ............................................................................................................ 62
14.1 The Loader Program Locates at LDFlash Memory ....................................................... 62
14.2 The Loader Program Locates at APFlash Memory ....................................................... 62
H/W WRITER MODE........................................................................................................................... 62
SECURITY BITS.................................................................................................................................. 63
ELECTRICAL CHARACTERISTICS.................................................................................................... 64
17.1 Absolute Maximum Ratings ........................................................................................... 64
17.2 DC Characteristics......................................................................................................... 64
17.3 A.C. Characteristics ....................................................................................................... 66
TYPICAL APPLICATION CIRCUITS ................................................................................................... 70
PACKAGE DIMENSIONS.................................................................................................................... 71
APPLICATION NOTE .......................................................................................................................... 72
REVISION HISTORY........................................................................................................................... 77
Publication Release Date: February 1, 2007
- 1 - Revision A6
1 page  
W79E632A/W79L632A
5. FUNCTIONAL DESCRIPTION
The W79E(L)632 is 8052 pin compatible and instruction set compatible. It includes the resources of
the standard 8052 such as four 8-bit I/O Ports, three 16-bit timer/counters, full duplex serial port and
interrupt sources.
The W79E(L)632 features a faster running and better performance 8-bit CPU with a redesigned core
processor without wasted clock and memory cycles. it improves the performance not just by running at
high frequency but also by reducing the machine cycle duration from the standard 8052 period of
twelve clocks to four clock cycles for the majority of instructions. This improves performance by an
www.DataSheet4U.comaverage of 1.5 to 3 times. It can also adjust the duration of the MOVX instruction (access to off-chip
data memory) between two machine cycles and nine machine cycles. This flexibility allows the
W79E(L)632 to work efficiently with both fast and slow RAMs and peripheral devices. In addition, the
W79E(L)632 contains on-chip 1KB MOVX SRAM, the address of which is between 0000H and
03FFH. It only can be accessed by MOVX instruction; this on-chip SRAM is optional under software
control.
The W79E(L)632 is an 8052 compatible device that gives the user the features of the original 8052
device, but with improved speed and power consumption characteristics. It has the same instruction
set as the 8051 family. While the original 8051 family was designed to operate at 12 clock periods per
machine cycle, the W79E(L)632 operates at a much reduced clock rate of only 4 clock periods per
machine cycle. This naturally speeds up the execution of instructions. Consequently, the W79E(L)632
can run at a higher speed as compared to the original 8052, even if the same crystal is used. Since
the W79E(L)632 is a fully static CMOS design, it can also be operated at a lower crystal clock, giving
the same throughput in terms of instruction execution, yet reducing the power consumption.
The 4 clocks per machine cycle feature in the W79E(L)632 is responsible for a three-fold increase in
execution speed. The W79E(L)632 has all the standard features of the 8052, and has a few extra
peripherals and features as well.
I/O Ports
The W79E(L)632 has four 8-bit ports and one extra 4-bit port. Port 0 can be used as an Address/Data
bus when external program is running or external memory/device is accessed by MOVC or MOVX
instruction. In these cases, it has strong pull-ups and pull-downs, and does not need any external pull-
ups. Otherwise it can be used as a general I/O port with open-drain circuit. Port 2 is used chiefly as
the upper 8-bits of the Address bus when port 0 is used as an address/data bus. It also has strong
pull-ups and pull-downs when it serves as an address bus. Port 1 and port 3 act as I/O ports with
alternate functions. Port 4 serves as a general purpose I/O port as Port 1 and Port 3.
Serial I/O
The W79E(L)632 has one enhanced serial ports that are functionally similar to the serial port of the
original 8052 family. However the serial ports on the W79E(L)632 can operate in different modes in
order to obtain timing similarity as well. The serial port has the enhanced features of Automatic
Address recognition and Frame Error detection.
Publication Release Date: February 1, 2007
- 5 - Revision A6
5 Page 
W79E632A/W79L632A
TR0: Timer 0 run control: This bit is set or cleared by software to turn timer/counter on or off.
IE1: Interrupt 1 edge detect: Set by hardware when an edge/level is detected on INT1. This bit is
cleared by hardware when the service routine is vectored to only if the interrupt was edge
triggered. Otherwise it follows the pin.
IT1: Interrupt 1 type control: Set/cleared by software to specify falling edge/ low level triggered
external inputs.
IE0:
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Interrupt 0 edge detect: Set by hardware when an edge/level is detected on INT0 . This bit is
cleared by hardware when the service routine is vectored to only if the interrupt was edge
triggered. Otherwise it follows the pin.
IT0: Interrupt 0 type control: Set/cleared by software to specify falling edge/ low level triggered
external inputs.
Timer Mode Control
Bit: 7 6 5 4 3 2 1 0
GATE C / T M1
M0 GATE C / T M1
M0
Mnemonic: TMOD
TIMER1
TIMER0
Address: 89h
GATE: Gating control: When this bit is set, Timer/counter x is enabled only while INTx pin is high and
TRx control bit is set. When cleared, Timer x is enabled whenever TRx control bit is set.
C / T : Timer or Counter Select: When cleared, the timer is incremented by internal clocks. When set
, the timer counts high-to-low edges of the Tx pin.
M1, M0: Mode Select bits:
M1 M0
00
01
10
11
Timer 0 LSB
MODE
Mode 0: 8-bits with 5-bit prescale.
Mode 1: 16-bits, no prescale.
Mode 2: 8-bits with auto-reload from THx
Mode 3: (Timer 0) TL0 is an 8-bit timer/counter controlled by the standard Timer 0
control bits. TH0 is a 8-bit timer only controlled by Timer 1 control bits. (Timer 1)
Timer/counter is stopped.
Bit: 7 6 5 4 3 2 1 0
TL0.7 TL0.6 TL0.5 TL0.4 TL0.3 TL0.2 TL0.1 TL0.0
Mnemonic: TL0
TL0.7−0: Timer 0 LSB
Address: 8Ah
- 11 -
Publication Release Date: February 1, 2007
Revision A6
11 Page | ||
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