PDF DFPAU Data sheet ( Hoja de datos )

Número de pieza	DFPAU
Descripción	Floating Point Arithmetic Coprocessor
Fabricantes	Digital Core Design
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No Preview Available ! www.DataSheet4U.com DFPAU Floating Point Arithmetic Coprocessor ver 2.05 OVERVIEW DFPAU is a Floating Point Arithmetic Co- processor, designed to assist CPU in per- forming the floating point arithmetic computa- tions. DFPAU directly replaces C software functions, by equivalent, very fast hardware operations, which significantly accelerate system performance. It doesn’t require any programming, so it also doesn’t require any modifications made in the main software. Everything is done automatically during soft- ware compilation by the DFPAU C driver. DFPAU was designed to operate with DCD’s DP8051, but can also operate with any other 8-, 16- and 32-bit processor. Drivers for all popular 8051 C compilers are delivered to- gether with the DFPAU package DFPAU uses the specialized algorithms to compute arithmetic functions. It supports ad- dition, subtraction, multiplication, division, square root, comparison, absolute value, and change sign of a number. The input numbers format is according to IEEE-754 standard single precision real numbers. DFPAU is pre- pared to use with 8-, 16- and 32-bit proces- sors. Trigonometric functions are supported indirectly, because they are computed as set of add, multiply and divide operations by software subroutines. Each floating point function can be turned on/off at configura- tion level providing the flexible scalability of DFPAU module. It allows save silicon space and provides exact configuration required by certain application. DFPAU is a technology independent design that can be implemented in a variety of proc- ess technologies. APPLICATIONS ● Math coprocessors ● DSP algorithms ● Embedded arithmetic coprocessor ● Fast data processing & control KEY FEATURES ● Direct replacement for C float software functions such as: +, -, *, /,==, !=,>=, <=, <, > ● C interface supplied for all popular compil- ers: GNU C/C++, 8051 compilers ● No programming required ● Configurability of all available functions ● IEEE-754 Single precision real format support – float type ● Flexible arguments and result registers location ● Performs the following functions: ○ FADD, FSUB – addition, subtraction ○ FMUL, FDIV – multiplication, division ○ FSQRT – square root ○ FCHS, FABS – change of sign, absolute value All trademarks mentioned in this document are trademarks of their respective owners. http://www.DigitalCoreDesign.com http://www.dcd.pl Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved. 1 page CONTACTS For any modification or special request please contact to Digital Core Design or local distributors. Headquarters: Wroclawska 94 41-902 Bytom, POLAND e-mail: iinnffoo@@ddccdd..ppll tel. : +48 32 282 82 66 fax : +48 32 282 74 37 www.DataSheet4U.com Distributors: Please checkhhtttpp::///wwwwww..ddccdd..ppll//aappaarrttnn..pphhpp All trademarks mentioned in this document are trademarks of their respective owners. http://www.DigitalCoreDesign.com http://www.dcd.pl Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved. 5 Page

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