|
|
PDF SH7263 Data sheet ( Hoja de datos )
| Número de pieza | SH7263 | |
| Descripción | 32-Bit RISC Microcomputer | |
| Fabricantes | Renesas | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de SH7263 (archivo pdf) en la parte inferior de esta página. Total 70 Páginas | ||
|
No Preview Available !
REJ09B0290-0200
The revision list can be viewed directly by clicking the title page.
The revision list summarizes the locations of revisions and
additions. Details should always be checked by referring to the
relevant text.
32
www.DataSheet4U.com
SH7263 Group
Hardware Manual
Renesas 32-Bit RISC Microcomputer
SuperHTM RISC engine Family / SH7260 Series
SH7263
R5S72630P200FP
R5S72631P200FP
R5S72632P200FP
R5S72633P200FP
Rev.2.00
Revision Date: Mar. 14, 2008
1 page  
Preface
This LSI is an RISC (Reduced Instruction Set Computer) microcomputer which includes a
Renesas Technology-original RISC CPU as its core, and the peripheral functions required to
configure a system.
Target Users: This manual was written for users who will be using this LSI in the design of
application systems. Target users are expected to understand the fundamentals of
electrical circuits, logical circuits, and microcomputers.
Objective:
This manual was written to explain the hardware functions and electrical
characteristics of this LSI to the target users.
Refer to the SH-2A, SH2A-FPU Software Manual for a detailed description of the
instruction set.
www.DatNaSohteeseto4nU.rceoamding this manual:
• In order to understand the overall functions of the chip
Read the manual according to the contents. This manual can be roughly categorized into parts
on the CPU, system control functions, peripheral functions and electrical characteristics.
• In order to understand the details of the CPU's functions
Read the SH-2A, SH2A-FPU Software Manual.
• In order to understand the details of a register when its name is known
Read the index that is the final part of the manual to find the page number of the entry on the
register. The addresses, bits, and initial values of the registers are summarized in section 34,
List of Registers.
Rev. 2.00 Mar. 14, 2008 Page v of xxxiv
REJ09B0290-0200
5 Page 
5.4 Register Bank Errors.......................................................................................................... 129
5.4.1 Register Bank Error Sources................................................................................. 129
5.4.2 Register Bank Error Exception Handling ............................................................. 129
5.5 Interrupts............................................................................................................................ 130
5.5.1 Interrupt Sources................................................................................................... 130
5.5.2 Interrupt Priority Level ......................................................................................... 131
5.5.3 Interrupt Exception Handling ............................................................................... 132
5.6 Exceptions Triggered by Instructions ................................................................................ 133
5.6.1 Types of Exceptions Triggered by Instructions .................................................... 133
5.6.2 Trap Instructions ................................................................................................... 134
5.6.3 Slot Illegal Instructions ......................................................................................... 134
5.6.4 General Illegal Instructions................................................................................... 135
5.6.5 Integer Division Exceptions.................................................................................. 135
5.6.6 FPU Exceptions .................................................................................................... 136
5.7 When Exception Sources Are Not Accepted ..................................................................... 137
www.Dat5a.S8heet4SUta.ccokmStatus after Exception Handling Ends...................................................................... 138
5.9 Usage Notes ....................................................................................................................... 140
5.9.1 Value of Stack Pointer (SP) .................................................................................. 140
5.9.2 Value of Vector Base Register (VBR) .................................................................. 140
5.9.3 Address Errors Caused by Stacking of Address Error Exception Handling ......... 140
Section 6 Interrupt Controller (INTC) ...............................................................141
6.1 Features.............................................................................................................................. 141
6.2 Input/Output Pins ............................................................................................................... 143
6.3 Register Descriptions ......................................................................................................... 144
6.3.1 Interrupt Priority Registers 01, 02, 05 to 17 (IPR01, IPR02, IPR05 to IPR17) .... 145
6.3.2 Interrupt Control Register 0 (ICR0)...................................................................... 147
6.3.3 Interrupt Control Register 1 (ICR1)...................................................................... 148
6.3.4 Interrupt Control Register 2 (ICR2)...................................................................... 149
6.3.5 IRQ Interrupt Request Register (IRQRR)............................................................. 150
6.3.6 PINT Interrupt Enable Register (PINTER)........................................................... 152
6.3.7 PINT Interrupt Request Register (PIRR) .............................................................. 153
6.3.8 Bank Control Register (IBCR).............................................................................. 154
6.3.9 Bank Number Register (IBNR) ............................................................................ 155
6.4 Interrupt Sources................................................................................................................ 156
6.4.1 NMI Interrupt........................................................................................................ 156
6.4.2 User Break Interrupt ............................................................................................. 156
6.4.3 H-UDI Interrupt .................................................................................................... 156
6.4.4 IRQ Interrupts ....................................................................................................... 156
6.4.5 PINT Interrupts ..................................................................................................... 157
Rev. 2.00 Mar. 14, 2008 Page xi of xxxiv
REJ09B0290-0200
11 Page | ||
| Páginas | Total 70 Páginas | |
| PDF Descargar | [ Datasheet SH7263.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| SH7263 | 32-Bit RISC Microcomputer | Renesas |
| SH7268 | Video Display Controller 4 Driver Users Manual | Renesas |
| SH7268 | 32-Bit RISC Microcomputer | Renesas |
| SH7268 | Digital Video Decoder Driver Users Manual | Renesas |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |