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54ACT825 데이터시트 PDF




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부품번호 54ACT825 기능
기능 8-Bit D Flip-Flop
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54ACT825 데이터시트, 핀배열, 회로
February 1999
www.DataSheet4U.com
54ACT825
8-Bit D Flip-Flop
General Description
The ’ACT825 is an 8-bit buffered register. They have Clock
Enable and Clear features which are ideal for parity bus in-
terfacing in high performance microprogramming systems.
Also included are multiple enables that allow multi-use con-
trol of the interface. The ’ACT825 has noninverting outputs
and is fully compatible with AMD’s Am29825.
Features
n Outputs source/sink 24 mA
n Inputs and outputs are on opposite sides
n ’ACT825 has TTL-compatible inputs
n Standard Microcircuit Drawing (SMD)
— ’ACT825: 5962-91611
Logic Symbols
IEEE/IEC
DS100254-1
Pin Names
D0– D7
O0– O7
OE1, OE2, OE3
EN
CLR
CP
Description
Data Inputs
Data Outputs
Output Enables
Clock Enable
Clear
Clock Input
DS100254-3
FACTis a trademark of Fairchild Semiconductor.
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS100254
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54ACT825 pdf, 반도체, 판매, 대치품
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
VI = VCC +0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC +0.5V
DC Output Voltage (VO)
DC Output Source or Sink Current
(IO)
DC VCC or Ground Current
Per Output Pin (ICC or IGND)
Storage Temperature (TSTG)
−0.5V to 7.0V
−20 mA
+20 mA
−0.5V to VCC +0.5V
−20 mA
+20 mA
+0.5V
±50 mA
±50 mA
−65˚C to +150˚C
DC Electrical Characteristics
Junction Temperature (TJ)
CDIP
175˚C
Recommended Operating
Conditions
Supply Voltage (VCC)
’ACT
4.5V to 5.5V
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
54ACT
0V to VCC
0V to VCC
−55˚C to +125˚C
Minimum Input Edge Rate (V/t)
’ACT Devices
VIN from 0.8V to 2.0V
VCC @ 4.5V, 5.5V
125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recom-
mend operation of FACTcircuits outside databook specifications.
Symbol
Parameter
VIH Minimum High Level
Input Voltage
VIL Maximum Low Level
Input Voltage
VOH Minimum High Level
54ACT
VCC
TA =
(V) −55˚C to
+125˚C
Guaranteed
Limits
4.5 2.0
5.5 2.0
4.5 0.8
5.5 0.8
4.5 4.4
5.5 5.4
VOL Maximum Low Level
Output Voltage
4.5 3.70
5.5 4.70
4.5 0.1
5.5 0.1
4.5
5.5
IIN
Maximum Input Leakage Current
5.5
IOZ Maximum TRI-STATE Current 5.5
ICCT
IOLD
IOHD
ICC
Maximum ICC/Input
(Note 3)
Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
5.5
5.5
5.5
5.5
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
0.50
0.50
±1.0
±10.0
1.6
50
−50
160
Units
Conditions
V VOUT = 0.1V
or VCC −0.1V
VOUT = 0.1V
or VCC −0.1V
V IOUT = −50 µA
(Note 2)
VIN = VIL or VIH
V IOH = −24 mA
IOH = −24 mA
V IOUT = 50 µA
(Note 2)
VIN = VIL or VIH
V IOL = 24 mA
IOL = 24 mA
µA VI = VCC, GND
µA VI = VIL, VIH
VO = VCC, GND
mA VI = VCC −2.1V
mA VOLD = 1.65V Max
mA VOHD = 3.85V Min
µA VIN = VCC
or GND
www.national.com
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54ACT825 전자부품, 판매, 대치품
Physical Dimensions inches (millimeters) unless otherwise noted
www.DataSheet4U.com
28-Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E28A
24 Lead Slim (0.300" Wide) Ceramic Dual-In-Line (SD)
NS Package Number J24F
7 www.national.com

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