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ADD8733 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 ADD8733은 전자 산업 및 응용 분야에서
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부품번호 ADD8733 기능
기능 Integrated TFT Panel Power Supply
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ADD8733 데이터시트, 핀배열, 회로
Preliminary Technical Data
Integrated TFT Panel Power Supply
with Gate Modulation and VCOM
ADD8733
FEATURES
Step-up switching regulator with 3 A switch current limit
8 V to 16.5 V input voltage range
Adjustable output voltage up to 20 V
1.2 A series switch for power sequencing
Overvoltage protection (OVP)
Step-down switching regulator with 3 A switch current limit
www.DataSheet4U8.Vcotmo 16.5 V input voltage range
Adjustable output voltage down to 2.5 V
Gate pulse modulator circuitry
Independently adjustable delay and falling slope
Positive charge-pump regulator for VGH
Negative charge-pump regulator for VGL
Two VCOM amplifiers
General
Power supply sequencing
Thermal fault protection
650 kHz or 1.2 MHz PWM frequency
Soft start
Undervoltage lockout (UVLO)
48-lead RoHS compliant LFCSP
APPLICATIONS
TFT LCD panels for TVs and monitors
BLOCK DIAGRAM
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
ADD8733
STEP-UP SWITCHING REGULATOR
AND POWER SEQUENCING
STEP-DOWN SWITCHING REGULATOR
TWO VCOM AMPLIFIERS
GATE PULSE
MODULATION
X
VGH
REGULATOR
VGL
REGULATOR
X
X
UNDERVOLTAGE
X
X LOCKOUT AND
X THERMAL PROTECTION
X
CONTROL
X
Figure 1.
GENERAL DESCRIPTION
The ADD8733 is a 4-channel regulator with two VCOM
amplifiers and gate pulse modulation (GPM) that provides
all the necessary voltages for thin film transistor (TFT) liquid
crystal displays (LCD). Included is a step-up regulator, a step-
down regulator for digital logic, two VCOM amplifiers, two
charge-pump regulators for VGH and VGL, and an integrated
gate pulse modulator.
By offering a complete power integration solution optimized for
TFT LCD TVs and monitors, the ADD8733 helps to lower cost,
simplify board design, and increase performance over existing
solutions.
The ADD8733 is offered in a 48-lead RoHS compliant LFCSP
and is specified over the industrial temperature range of −40°C
to +85°C.
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.




ADD8733 pdf, 반도체, 판매, 대치품
ADD8733
Preliminary Technical Data
STEP-DOWN REGULATOR SPECIFICATIONS
VVIN = VSD_VIN = 12 V, L2=10 μH, TA = 25°C, fOSC = 650 kHz, unless otherwise noted.
Table 2.
Parameter
SUPPLY
Input Voltage
Minimum Duty Cycle
OUTPUT
Output Voltage
Load Regulation
Line Regulation
www.DataShOeevte4rUal.lcRoemgulation
ERROR AMPLIFER
FB Regulation Voltage
FB Input Bias Current
Error Amplifier Open-Loop Voltage Gain
COMP Output Current
SWITCH
On Resistance
Peak Current Limit
OSCILLATOR
Oscillator Frequency
Symbol Conditions
VSD_VIN
VSTEP_DN
500 mA ≤ ILOAD ≤ 1000 mA, VSTEP_DN = 3.3 V
ILOAD = 750 mA, 8 V ≤ VSD_VIN ≤ 16.5 V, VSTEP_DN = 3.3 V
Line, load, temperature
VSD_FB
ISD_FB
AVSD
ISD_COMP
RDS (ON)SD
ISDCLSET
SD_BS = 5 V, ISD_LOAD = 750 mA
fOSC FREQ = GND
FREQ = VSR_OUT1
1 VSR_OUT pin provides a logic-high output of 5 V.
Min Typ Max Unit
8.0
15
16.5 V
%
2.5
1
1
5V
%
%
±3 %
2.5 V
TBD nA
TBD V/V
TBD μA
100 mΩ
3A
650
1200
kHz
kHz
Rev. PrA | Page 4 of 16

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ADD8733 전자부품, 판매, 대치품
Preliminary Technical Data
ADD8733
ABSOLUTE MAXIMUM RATINGS
Table 8.
Parameter1
SD_VIN/SD_SW/SD_BS/SD_FB/SD_COMP
to SU_PGND
NCP_REF/NCP_FB/NCP_DRV to NPCP_GND
PCP_FB/PCP_DRV/NPCP_SUP to NPCP_GND
GPM_FLK/GPM_CE/GPM_DPM to GND
GPM_RE/GPM_OUT/GPM_H/GPM_L to GND
VC1_POS/VC1_NEG/VC1_OUT/VC2_OUT/VC2_POS/
VC2_NEG to VC1_GND
www.DataSheeSt4UU_.ScWom/SU_D/SU_S/SU_FB/SU_COMP to SU_PGND
VGL_DLY/SU_DLY/SD_SS/SU_SS/VSR_OUT to GND
Voltage Between SU_PGND, NPCP_GND,
and GND
Package Power Dissipation (PD)
Thermal Resistance for Exposed Pad Soldered to
4-Layer JEDEC PC Board (θJA)
Maximum Junction Temperature (TJ)
Operating Temperature Range (TA)
Storage Temperature Range (TS)
Reflow Peak Temperature (20 sec to 40 sec)
Rating
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
±0.5
(TJ max − TA)/θJA
25.88°C/W
125°C
−40°C to +85°C
−65°C to +150°C
250°C
1 SU_PGND, VC1_GND, NPCP_GND, and GND are connected to a common
ground connection.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. PrA | Page 7 of 16

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ADD8733

Integrated TFT Panel Power Supply

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