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PDF DG2015 Data sheet ( Hoja de datos )
| Número de pieza | DG2015 | |
| Descripción | Dual DPDT Analog Switch | |
| Fabricantes | Vishay Siliconix | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DG2015 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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New Product
DG2015
Vishay Siliconix
Low-Voltage, Low rON, Dual DPDT Analog Switch
FEATURES
D Low Voltage Operation (2.7 V to 3.3 V)
D Low On-Resistance - rON: 0.85 W
D 3 dB Loss @ 100 MHz
www.DataSheeDt4UF.caosmt Switching: tON = 40 ns
tOFF = 35 ns
D QFN-16 Package
BENEFITS
D Reduced Power Consumption
D High Accuracy
D Reduce Board Space
D TTL/1.8-V Logic Compatible
D High Bandwidth
APPLICATIONS
D Cellular Phones
D Speaker Headset Switching
D Audio and Video Signal Routing
D PCMCIA Cards
D Battery Operated Systems
DESCRIPTION
The DG2015 is a dual double-pole/double-throw monolithic
CMOS analog switch designed for high performance switching
of analog signals. Combining low power, high speed, low
on-resistance and small physical size, the DG2015 is ideal for
portable and battery powered applications requiring high
performance and efficient use of board space.
The DG2015 is built on Vishay Siliconix’s low voltage JI2 process.
An epitaxial layer prevents latchup. Break-before-make is
guaranteed.
The switch conducts equally well in both directions when on,
and blocks up to the power supply level when off.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG2015
QFN-16 (4 X 4)
NC1 COM1 GND COM4
16 15 14 13
NO1 1
INA 2
NO2 3
NC2 4
12 NC4
11 NO4
10 INB
9 NO3
5678
COM2 V+ COM3 NC3
Top View
Logic
0
1
TRUTH TABLE
NC1, 2, 3 and 4 NO1, 2, 3 and 4
ON
OFF
OFF
ON
ORDERING INFORMATION
Temp Range
-40 to 85°C
Package
16-Pin QFN (4 x 4 mm)
Part Number
DG2015DN
Document Number: 71971
S-03423—Rev. B, 03-Mar-03
www.vishay.com
1
1 page  
New Product
DG2015
Vishay Siliconix
TEST CIRCUITS
Switch
Input
Logic
Input
www.DataSheet4U.com
V+
V+
NO or NC
COM
IN
GND
0V
Switch Output
VOUT
RL
300 W
CL
35 pF
Logic
Input
Switch
Output
CL (includes fixture and stray capacitance)
ǒ ǓVOUT + VCOM
RL
RL ) RON
Figure 1.
Switching Time
VINH
VINL
50%
tr t 5 ns
tf t 5 ns
0.9 x VOUT
0V
tON
tOFF
Logic “1” = Switch On
Logic input waveforms inverted for switches that have
the opposite logic sense.
V+
V+
VNO
NO
COM
NC
VNC
IN
GND
RL
300 W
VO
CL
35 pF
Logic
Input
VINH
VINL
VNC = VNO
VO
Switch 0 V
Output
CL (includes fixture and stray capacitance)
Figure 2. Break-Before-Make Interval
90%
tD
tr <5 ns
tf <5 ns
tD
V+
Vgen
Rgen
+
VIN = 0 - V+
COM
V+
NC or NO
IN
GND
VOUT
CL = 1 nF
VOUT
IN
On
DVOUT
Off
Q = DVOUT x CL
On
Figure 3. Charge Injection
IN depends on switch configuration: input polarity
determined by sense of switch.
Document Number: 71971
S-03423—Rev. B, 03-Mar-03
www.vishay.com
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet DG2015.PDF ] | |
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