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부품번호 | MC33911 기능 |
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기능 | LIN System Basis Chip | ||
제조업체 | Freescale Semiconductor | ||
로고 | |||
전체 30 페이지수
Freescale Semiconductor
Advance Information
LIN System Basis Chip with DC
Motor Pre-driver
Document Number: MC33911
Rev. 4.0, 2/2008
33911
The 33911 is a Serial Peripheral Interface (SPI)-controlled System
Basis Chip (SBC) combining many frequently used functions in an
MCU-based system, plus a Local Interconnect Network (LIN)
transceiver. The 33911 has a 5.0V - 60mA low dropout regulator with
full protection and reporting features. The device provides full SPI-
readable diagnostics and a selectable timing watchdog for detecting
errant operation. The LIN Protocol Specification 2.0 compliant LIN
transceiver, has waveshaping circuitry that can be disabled for higher
data rates.
SYSTEM BASIS CHIP WITH LIN
2ND GENERATION
One 60mA high side switch and two 160mA low side switches with
www.DataSheeot4uUtp.cuotmprotection are available for driving resistive and inductive loads.
All outputs can be pulse-width modulated (PWM). Two high-voltage
inputs are available for use in contact monitoring, or as external wake-
up inputs. These inputs can be used as high-voltage analog Inputs.
The voltage on theses pins is divided by a selectable ratio and
available via an analog multiplexer.
The 33911 has three main operating modes: Normal (all functions
available), Sleep (VDD off, wake-up via LIN, wake-up inputs (L1,L2),
cyclic sense, and forced wake-up), and Stop (VDD on with limited
current capability, wake-up via CS, LIN bus, wake-up inputs, cyclic
sense, forced wake-up, and external reset).
The 33911 is compatible with LIN Protocol Specification 2.0.
Features
AC SUFFIX (Pb-FREE)
98ASH70029A
32-PIN LQFP
ORDERING INFORMATION
Device
Temperature
Range (TA)
Package
• One 60mA high side switch and two 160mA low side switches
MC33911BAC/R2
• Two high-voltage analog/logic inputs
• Full-duplex SPI Interface at frequencies up to 4MHz
MC34911BAC/R2
• LIN transceiver capable of up to 100kbps with wave shaping
• Configurable window watchdog
• 5.0V low drop regulator with fault detection and low-voltage reset (LVR) circuitry
• Pb-free packaging designated by suffix code AC
-40°C to 125°C
-40°C to 85°C
32-LQFP
VBAT
33911
VS1 VSENSE
VS2 HS1
L1
L2
VDD
MCU
PWMIN
ADOUT0
MOSI
MISO
SCLK
CS
RXD
TXD
IRQ
RST
LS1
LS2
WDCONF
LIN
M
LIN INTERFACE
Figure 1. 33911 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
PIN CONNECTIONS
Table 1. 33911 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 20.
Pin
Pin Name
Formal Name
Definition
12
WDCONF
Watchdog
Configuration Pin
This input pin is for configuration of the watchdog period and
allows the disabling of the watchdog.
13 LIN
LIN Bus
This pin represents the single-wire bus transmitter and receiver.
This pin is the device LIN ground connection. It is internally connected to the
14
LGND
LIN Ground Pin
PGND pin.
17
19
www.DataSheet4U.co1m8
LS2
LS1
PGND
Low Side Outputs Relay drivers low side outputs.
Power Ground Pin
This pin is the device low side ground connection. It is internally connected to
the LGND pin.
22 L2
These pins are the wake-up capable digital inputs(1). In addition, all LX inputs
23
L1
Wake-Up Inputs
can be sensed analog via the analog multiplexer.
25 HS1 High Side Output High side switch output.
26 VS2
These pins are device battery level power supply pins. VS2 is supplying the
27 VS1 Power Supply Pin HS1 driver while VS1 supplies the remaining blocks.(2)
29
VSENSE
Voltage Sense Pin Battery voltage sense input. (3)
31
VDD
Voltage Regulator
Output
+5.0V main voltage regulator output pin. (4)
32
AGND
Analog Ground Pin This pin is the device analog ground connection.
Notes
1. When used as a digital input, a series 33kΩ resistor must be used to protect against automotive transients.
2. Reverse battery protection series diodes must be used externally to protect the internal circuitry.
3. This pin can be connected directly to the battery line for voltage measurements. The pin is self-protected against reverse battery
connections. It is strongly recommended to connect a 10kΩ resistor in series with this pin for protection purposes.
4. External capacitor (2µF < C < 100µF; 0.1Ω < ESR < 10Ω) required.
33911
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
4페이지 ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions 5.5V ≤ VSUP ≤ 18V, -40°C ≤ TA ≤ 125°C for the 33911 and -40°C ≤ TA ≤ 85°C for the
34911, unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal
conditions, unless otherwise noted.
Characteristic
SUPPLY VOLTAGE RANGE (VS1, VS2)
Symbol Min Typ Max Unit
Nominal Operating Voltage
VSUP 5.5 – 18 V
Functional Operating Voltage(18)
VSUPOP
–
– 27 V
Load Dump
VSUPLD
–
– 40 V
www.DataSheetS4UUP.cPoLmY CURRENT RANGE (VSUP = 13.5V)
Normal Mode (IOUT at VDD = 10mA), LIN Recessive State(19)
Stop Mode, VDD ON with IOUT = 100µA, LIN Recessive State(19), (20), (21)
5.5V < VSUP < 12V
VSUP = 13.5V
IRUN
ISTOP
– 4.5 10 mA
µA
– 48 80
– 58 90
Sleep Mode, VDD OFF, LIN Recessive State(19), (21)
5.5V < VSUP < 12V
12V ≤ VSUP < 13.5V
ISLEEP
µA
– 27 35
– 37 48
Cyclic Sense Supply Current Adder(22)
ICYCLIC – 10 – µA
SUPPLY UNDER/OVER VOLTAGE DETECTIONS
Power-On Reset (BATFAIL)(23)
Threshold (measured on VS1)(22)
Hysteresis (measured on VS1)(22)
VBATFAIL
1.5
3.0
3.9
VBATFAIL_HYS
–
0.9
–
V
VSUP Under-voltage Detection (VSUV Flag) (Normal and Normal Request
Modes, Interrupt Generated)
Threshold (measured on VS1)
Hysteresis (measured on VS1)
VSUP Over-voltage Detection (VSOV Flag) (Normal and Normal Request
Modes, Interrupt Generated)
Threshold (measured on VS1)
Hysteresis (measured on VS1)
VSUV
VSUV_HYS
VSOV
VSOV_HYS
5.55
–
18
–
6.0
1.0
19.25
1.0
6.6
–
20.5
–
V
V
Notes
18. Device is fully functional. All features are operating.
19. Total current (IVS1 + IVS2) measured at GND pins excluding all loads, cyclic sense disabled.
20. Total IDD current (including loads) below 100µA.
21. Stop and Sleep Modes current will increase if VSUP exceeds 13.5V.
22. This parameter is guaranteed by process monitoring but not production tested.
23. The flag is set during power-up sequence. To clear the flag, a SPI read must be performed.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33911
7
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