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PDF MB90F548G Data sheet ( Hoja de datos )
| Número de pieza | MB90F548G | |
| Descripción | (MB90F5xx) 16-bit Proprietary Microcontroller | |
| Fabricantes | Fujitsu Media Devices | |
| Logotipo |  |
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FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-13703-5E
16-bit Proprietary Microcontroller
CMOS
F2MC-16LX MB90540/G/545/G Series
MB90F543/F549/V540
www.DataSheetM4U.Bco9m0F543G(S)/F546G(S)/F548G(S)/F549G(S)/549G(S)/V540G
MB90543G(S)/547G(S)/548G(S)/F548GL(S)
s DESCRIPTION
The MB90540/545 series with FULL-CAN*1 and FLASH ROM is specially designed for automotive and industrial
applications. Its main features are two on board CAN Interfaces (one for MB90V545 series) , which conform to
V2.0 Part A and Part B, supporting very flexible message buffer scheme and so offering more functions than a
normal full CAN approach. The instruction set by F2MC-16LX CPU core inherits an AT architecture of the F2MC*2
family with additional instruction sets for high-level languages, extended addressing mode, enhanced multiplica-
tion/division instructions, and enhanced bit manipulation instructions.The micro controller has a 32-bit accumulator
for processing long word data.The MB90540/545 series has peripheral resources of 8/10-bit A/D converters,
UART (SCI) , extended I/O serial interfaces, 8/16-bit timer, I/O timer (input capture (ICU) , output compare (OCU) ) .
*1 : Controller Area Network (CAN) -License of Robert Bosch GmbH.
*2 : F2MC stands for FUJITSU Flexible Microcontroller.
s FEATURES
• Clock
Embedded PLL clock multiplication circuit
Operating clock (PLL clock) can be selected from : divided-by-2 of oscillation or one to four times the oscillation
Minimum instruction execution time : 62.5 ns (operation at oscillation of 4 MHz, four times the oscillation clock)
Subsystem Clock : 32 kHz
s PACKAGES
(Continued)
100-pin Plastic QFP
100-pin Plastic LQFP
(Continued)
(FPT-100P-M06)
(FPT-100P-M05)
1 page  
MB90540/540G/545/545G Series
(Continued)
Features
MB90F543/F549
MB90F543G (S) /F548G (S)
MB90F549G (S) /F546G (S)
MB90F548GL(S)
MB90543G (S) *1
MB90547G (S) *1
MB90548G (S)
MB90549G (S)
MB90V540
MB90V540G
16-bit Reload Timer
(2 channels)
Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys = System clock frequency)
Supports External Event Count function
Signals an interrupt when overflow
16-bit I/O Timer
Supports Timer Clear when a match with Output Compare (Channel 0)
Operation clock freq. : fsys/22, fsys/24, fsys/26, fsys/28 (fsys = System clock freq.)
www.DataSheet41U6.c-bomit Output Compare
(4 channels)
Signals an interrupt when a match with 16-bit I/O Timer
Four 16-bit compare registers
A pair of compare registers can be used to generate an output signal
16-bit Input Capture
(8 channels)
Rising edge, falling edge or rising & falling edge sensitive
Four 16-bit Capture registers
Signals an interrupt upon external event
8/16-bit
Programmable
Pulse Generator
(4 channels)
Supports 8-bit and 16-bit operation modes
Eight 8-bit reload counters
Eight 8-bit reload registers for L pulse width
Eight 8-bit reload registers for H pulse width
A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as 8-bit
prescaler plus 8-bit reload counter
4 output pins
Operation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24 or 128 µs@fosc = 4 MHz
(fsys = System clock frequency, fosc = Oscillation clock frequency)
CAN Interface
MB90540 series
: 2 channels
MB90545 series
: 1 channel
Conforms to CAN Specification Version 2.0 Part A and B
Automatic re-transmission in case of error
Automatic transmission responding to Remote Frame
Prioritized 16 massage buffers for data and ID’s supports multipe massages
Flexible configuration of acceptance filtering :
Full bit compare/Full bit mask/Two partial bit masks
Supports up to 1 Mbps
32 kHz Sub-clock
Sub-clock for low power operation
External Interrupt
(8 channels)
Can be programmed edge sensitive or level sensitive
External bus
interface
External access using the selectable 8-bit or 16-bit bus is enabled
(external bus mode.)
I/O Ports
Virtually all external pins can be used as general purpose I/O
All push-pull outputs and schmitt trigger inputs
Bit-wise programmable as input/output or peripheral signal
Sub-clock for 32 kHz Sub clock low power operation
Flash Memory
Supports automatic programming, Embeded Algorithm TM*4
Write/Erase/Erase-Suspend/Erase-Resume commands
A flag indicating completion of the algorithm
Number of erase cycles : 10,000 times
Data retention time : 10 years
Boot block configuration
Erase can be performed on each block
Block protection by externally programmed voltage
*1 : Under development
*2 : If the one clock system is used, equip X0A and X1A with clocks from the tool side.
5
5 Page 
MB90540/540G/545/545G Series
Pin No.
LQFP*2 QFP*1
20 22
Pin name
P44
SCK1
www.DataSheet4U.c2om2
24
P45
SOT1
23 25
P46
SOT2
24 26
P47
SCK2
26 28
P50
SIN2
P51 to P54
27 to 30 29 to 32
INT4 to INT7
31 33
P55
ADTG
36 to 39 38 to 41
P60 to P63
AN0 to AN3
41 to 44 43 to 46
P64 to P67
AN4 to AN7
45 47
P56
TIN0
Circuit
type
G
G
G
G
D
D
D
E
E
D
Function
General I/O port. This function is enabled when UART1
disables the clock output.
Serial clock pulse I/O pin for UART1. This function is
enabled when UART1 enables the serial clock output.
General I/O port. This function is enabled when UART1
disables the serial data output.
Serial data output pin for UART1. This function is enabled when
UART1 enables the serial data output.
General I/O port. This function is enabled when the Extended
I/O serial interface disables the serial data output.
Serial data output pin for the Extended I/O serial interface. This
function is enabled when the Extended I/O serial interface en-
ables the serial data output.
General I/O port. This function is enabled when the Extended
I/O serial interface disables the clock output.
Serial clock pulse I/O pin for the Extended I/O serial interface .
This function is enabled when the Extended I/O serial interface
enables the Serial clock output.
General I/O port. This function is always enabled.
Serial data input pin for the Extended I/O serial interface . Set
the corresponding Port Direction Register to input if this func-
tion is used.
General I/O port. This function is always enabled.
External interrupt request input pins for INT4 to INT7. Set the
corresponding Port Direction Register to input if this function is
used.
General I/O port. This function is always enabled.
Trigger input pin for the A/D converter. Set the corresponding
Port Direction Register to input if this function is used.
General I/O port. This function is enabled when the analog
input enable register specifies a port.
Analog input pins for the 8/10-bit A/D converter. This function is
enabled when the analog input enable register specifies A/D.
General I/O port. The function is enabled when the analog
input enable register specifies a port.
Analog input pins for the 8/10-bit A/D converter. This function is
enabled when the analog input enable register specifies A/D.
General I/O port. This function is always enabled.
Event input pin for the 16-bit reload timers 0. Set the
corresponding Port Direction Register to input if this function is
used.
(Continued)
11
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| PDF Descargar | [ Datasheet MB90F548G.PDF ] | |
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