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PDF HV2303 Data sheet ( Hoja de datos )
| Número de pieza | HV2303 | |
| Descripción | 8-Channel High Voltage Analog Switch | |
| Fabricantes | Supertex | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HV2303 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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HV2303
Low Charge Injection, 8-Channel High Voltage
Analog Switch with Bleed Resistors
Features
► HVCMOS technology for high performance
► Integrated bleed resistors on the outputs
► 3.3V or 5.0V CMOS input logic level
► 20MHz data shift clock frequency
► Very low quiescent power dissipation - 10µA
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► Low parasitic capacitance
► DC to 10MHz analog signal frequency
► -60dB typical off-isolation at 5.0MHz
► CMOS logic circuitry for low power
► Excellent noise immunity
► Cascadable serial data register with latches
► Flexible operating supply voltages
Applications
► Medical ultrasound imaging
► NDT metal flaw detection
► Piezoelectric transducer drivers
► Inkjet printer heads
► Optical MEMS modules
General Description
The Supertex HV2303 is a low charge injection 8-channel high
voltage analog switch integrated circuit (IC) with bleed resistors.
The device can be used in applications requiring high voltage
switching controlled by low voltage signals, such as medical
ultrasound imaging, piezoelectric transducer driver, and printers.
The bleed resistors eliminate voltage built up on capacitive loads
such as piezoelectric transducers.
Data is input into an 8-bit shift register that can then be retained
in an 8-bit latch. To reduce any possible clock feed-through noise,
the latch enable bar should be left high until all bits are clocked in.
Data is clocked in during the rising edge of the clock.
Using HVCMOS technology, this device combines high voltage
bilateral DMOS switches and low power CMOS logic to provide
efficient control of high voltage analog signals.
The device is suitable for various combinations of high voltage
supplies, e.g., VPP/VNN: +40V/-140V, +90V/-90V, and +140V/-40V.
Block Diagram
CLK
DIN
DOUT
8-BIT
SHIFT
REGISTER
LATCHES
LEVEL
SHIFTERS &
OUTPUT
SWITCHES
CHARGE CONTROL
D
LE
CLR
D
LE
CLR
D
LE
CLR
SW0
SW1
SW2
D
LE
CLR
D
LE
CLR
VDD GND LE CLR
VNN VPP
SW6
SW7
RGND
1 page  
HV2303
Truth Table
D0 D1 D2 D3 D4 D5 D6 D7 LE CLR SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7
L L L Off
H L L On
L
LL
Off
H
LL
On
L
LL
Off
H
LL
On
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L
H
LL
LL
Off
On
L LL
Off
H LL
On
L LL
Off
H LL
On
L LL
Off
H LL
On
LLL
Off
HLL
On
XXXXXXXXH L
Hold Previous State
XXXXXXXXXH
All Switches Off
Notes:
1. The eight switches operate independently.
2. Serial data is clocked in on the L to H transition of the CLK.
3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flow through the latch.
4. DOUT is high when data in the shift register 7 is high.
5. Shift register clocking has no effect on the switch states if LE is high.
6. The CLR clear input overrides all other inputs.
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HV2303.PDF ] | |
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