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C8051F016 데이터시트 PDF




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부품번호 C8051F016 기능
기능 (C8051F010 - C8051F017) Mixed-Signal 32KB ISP FLASH MCU Family
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C8051F016 데이터시트, 핀배열, 회로
PRELIMINARY
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Mixed-Signal 32KB ISP FLASH MCU Family
ANALOG PERIPHERALS
- SAR ADC
§ 12-Bit (C8051F000/1/2, C8051F005/6/7)
§ 10-bit (C8051F010/1/2, C8051F015/6/7)
§ ±1LSB INL
§ Programmable Throughput up to 100ksps
§ Up to 8 External Inputs; Programmable as Single-
Ended or Differential
§ Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5
§ Data Dependent Windowed Interrupt Generator
§ Built-in Temperature Sensor (± 3° C)
- Two 12-bit DACs
www.DataSheet4U.c-om Two Analog Comparators
§ 16 Programmable Hysteresis Values
§ Configurable to Generate Interrupts or Reset
- Voltage Reference
§ 2.4V; 15 ppm/° C
§ Available on External Pin
- Precision VDD Monitor/Brown-out Detector
ON-CHIP JTAG DEBUG & BOUNDRY SCAN
- On-Chip Debug Circuitry Facilitates Full Speed, Non-
Intrusive In-System Debug (No Emulator Required!)
- Provides Breakpoints, Single Stepping, Watchpoints, Stack
Monitor
- Inspect/Modify Memory and Registers
- Superior Performance to Emulation Systems Using ICE-
Chips, Target Pods, and Sockets
- IEEE1149.1 Compliant Boundary Scan
- Low Cost Development Kit: $99
HIGH SPEED 8051 µC CORE
- Pipelined Instruction Architecture; Executes 70% of
Instruction Set in 1 or 2 System Clocks
- Up to 25MIPS Throughput with 25MHz Clock
- 21 Vectored Interrupt Sources
MEMORY
- 256 Bytes Internal Data RAM (F000/01/02/10/11/12)
- 2304 Bytes Internal Data RAM (F005/06/07/15/16/17)
- 32k Bytes FLASH; In-System Programmable in 512 byte
Sectors
DIGITAL PERIPHERALS
- 4 Byte-Wide Port I/O; All are 5V tolerant
- Hardware SMBusTM (I2CTM Compatible), SPITM, and UART
Serial Ports Available Concurrently
- Programmable 16-bit Counter/Timer Array with 5
Capture/Compare Modules
- 4 General Purpose 16-bit Counter/Timers
- Dedicated Watch-Dog Timer
- Bi-directional Reset
CLOCK SOURCES
- Internal Programmable Oscillator: 2-to-16MHz
- External Oscillator: Crystal, RC,C, or Clock
- Can Switch Between Clock Sources on-the-fly; Useful in
Power Saving Modes
SUPPLY VOLTAGE ........................ 2.7V to 3.6V
- Typical Operating Current: 10mA @ 20MHz
- Multiple Power Saving Sleep and Shutdown Modes
64-Pin TQFP, 48-Pin TQFP, 32-Pin LQFP
Temperature Range: –40° C to +85° C
Page 1
ANALOG PERIPHERALS
TEMP
SENSOR
PGA
SAR
ADC
12-Bit
DAC
12-Bit
DAC
VREF
+
+-
-
VOLTAGE
COMPARATORS
DIGITAL I/O
PCA
SMBus
SPI Bus
UART
Timer 0
Timer 1
Timer 2
Timer 3
HIGH-SPEED CONTROLLER CORE
8051 CPU
(25MIPS)
32KB
ISP FLASH
CLOCK
CIRCUIT
JTAG
DEBUG
CIRCUITRY
256/2304 B
21
SANITY
SRAM INTERRUPTS CONTROL
CYGNAL Integrated Products, Inc. 2001
4.2001; Rev. 1.3




C8051F016 pdf, 반도체, 판매, 대치품
PRELIMINARY
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
10.4. INTERRUPT HANDLER......................................................................................................................76
Table 10.4. Interrupt Summary ........................................................................................................................77
Figure 10.9. IE: Interrupt Enable .....................................................................................................................78
Figure 10.10. IP: Interrupt Priority ..................................................................................................................79
Figure 10.11. EIE1: Extended Interrupt Enable 1 ............................................................................................80
Figure 10.12. EIE2: Extended Interrupt Enable 2 ............................................................................................81
Figure 10.13. EIP1: Extended Interrupt Priority 1 ...........................................................................................82
Figure 10.14. EIP2: Extended Interrupt Priority 2 ...........................................................................................83
10.5. Power Management Modes ....................................................................................................................84
Figure 10.15. PCON: Power Control Register .................................................................................................85
11. FLASH MEMORY............................................................................................................ 86
11.1. Programming The Flash Memory...........................................................................................................86
Table 11.1. FLASH Memory Electrical Characteristics...................................................................................86
www.DataSheet4U.com 11.2. Non-volatile Data Storage ......................................................................................................................87
11.3. Security Options.....................................................................................................................................87
Figure 11.1. PSCTL: Program Store RW Control............................................................................................87
Figure 11.2. Flash Program Memory Security Bytes ........................................................................................88
Figure 11.3. FLACL: Flash Access Limit (C8051F005/06/07/15/16/17 only) ................................................89
Figure 11.4. FLSCL: Flash Memory Timing Prescaler ....................................................................................90
12. EXTERNAL RAM (C8051F005/06/07/15/16/17) ............................................................ 91
Figure 12.1. EMI0CN: External Memory Interface Control ............................................................................91
13. RESET SOURCES ............................................................................................................ 92
Figure 13.1. Reset Sources Diagram ................................................................................................................92
13.1. Power-on Reset ......................................................................................................................................93
13.2. Software Forced Reset ...........................................................................................................................93
Figure 13.2. VDD Monitor Timing Diagram ...................................................................................................93
13.3. Power-fail Reset .....................................................................................................................................93
13.4. External Reset ........................................................................................................................................94
13.5. Missing Clock Detector Reset ................................................................................................................94
13.6. Comparator 0 Reset................................................................................................................................94
13.7. External CNVSTR Pin Reset .................................................................................................................94
13.8. Watchdog Timer Reset...........................................................................................................................94
Figure 13.3. WDTCN: Watchdog Timer Control Register ..............................................................................95
Figure 13.4. RSTSRC: Reset Source Register .................................................................................................96
Table 13.1. Reset Electrical Characteristics.....................................................................................................97
14. OSCILLATOR................................................................................................................... 98
Figure 14.1. Oscillator Diagram.......................................................................................................................98
Figure 14.2. OSCICN: Internal Oscillator Control Register ............................................................................99
Table 14.1. Internal Oscillator Electrical Characteristics.................................................................................99
Figure 14.3. OSCXCN: External Oscillator Control Register........................................................................100
14.1. External Crystal Example.....................................................................................................................101
14.2. External RC Example...........................................................................................................................101
14.3. External Capacitor Example.................................................................................................................101
15. PORT INPUT/OUTPUT ................................................................................................. 102
15.1. Priority Cross Bar Decoder ..................................................................................................................102
15.2. Port I/O Initialization ...........................................................................................................................102
Figure 15.1. Port I/O Functional Block Diagram ...........................................................................................103
Figure 15.2. Port I/O Cell Block Diagram .....................................................................................................103
Table 15.1. Crossbar Priority Decode ............................................................................................................104
Figure 15.3. XBR0: Port I/O CrossBar Register 0 .........................................................................................105
Figure 15.4. XBR1: Port I/O CrossBar Register 1 .........................................................................................106
Figure 15.5. XBR2: Port I/O CrossBar Register 2 .........................................................................................107
15.3. General Purpose Port I/O .....................................................................................................................108
15.4. Configuring Ports Which are not Pinned Out.......................................................................................108
Page 4
CYGNAL Integrated Products, Inc. 2001
4.2001; Rev. 1.3

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C8051F016 전자부품, 판매, 대치품
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
PRELIMINARY
Figure 21.4. FLASHADR: JTAG Flash Address Register .............................................................................166
Figure 21.5. FLASHDAT: JTAG Flash Data Register...................................................................................167
Figure 21.6. FLASHSCL: JTAG Flash Scale Register ..................................................................................167
21.3. Debug Support .....................................................................................................................................168
www.DataSheet4U.com
4.2001; Rev. 1.3
CYGNAL Integrated Products, Inc. 2001
Page 7

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관련 데이터시트

부품번호상세설명 및 기능제조사
C8051F010

(C8051F010 - C8051F017) Mixed-Signal 32KB ISP FLASH MCU Family

Cygnal
Cygnal
C8051F010

(C8051F010 - C8051F017) Mixed-Signal 32KB ISP FLASH MCU Family

Silicon Laboratories
Silicon Laboratories

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