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KS1461 데이터시트 PDF




Samsung Semiconductor에서 제조한 전자 부품 KS1461은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 KS1461 자료 제공

부품번호 KS1461 기능
기능 RF Signal Processor
제조업체 Samsung Semiconductor
로고 Samsung Semiconductor 로고


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KS1461 데이터시트, 핀배열, 회로
PRELIMINARY
RF SIGNAL PROCESSOR
KS1461
INTRODUCTION
The KS1461 receives optical signals from the optical pickup and makes the data-generation RF
(Radio Frequency) signals needed in the system part, and the servo error signal and monitor signals, needed for
stable servo control. The modes to which this RF IC can be applied are the CD 1×, 2×, 4×, and 8× modes
(Wide PLL +/- 20%) and the DVD 1× and 2× CLV (Constant Linear Velocity) modes.
FEATURES
www.DataSheet4U.com
• Compatible to play back of CDs at 1×, 2×, 4×, or 8×, and DVDs at 1× and 2×
• Can deal with all of CD-R corresponding P/Us’ optical signal input without additional circuits
• Built-in PreAmp that correspond to various P/U unit and gain controllable
• Built-in AGC (Automatic Gain Control) circuit for intensity radiation detection feedback
• RF AMP & equalizer for CD 1×, 2×, 4×, 8× and DVD 1×, and 2× compatibility
• Astigmatism FE (Focus Error) AMP for CD and DVD built-in
• TE (Tracking Error) AMP built-in for 3-beam method of CD
• TE (Tracking Error) AMP built-in to the 1-beam DPD (Differential Phase Detector) for DVD
• RF mirror detection circuit built-in for CD and DVD
• RF defect detection circuit built-in for CD and DVD
• FOK (Focus O.K) signal detection circuit built-in for CD and DVD
• Built-in RF envelope signal generator circuit for CD and DVD
• Built-in ALPC (Automatic Laser Power Control) circuit for CD and DVD
• Built-in standard voltage generating circuit for analog circuit
• Built-in detection circuit for abnormal wave forms
• Built-in Auto Offset compensation circuit
• Range of power in operation: 4.5 ~ 5.5V
• 100 PIN, TQFP (0.5 mm PITCH)
1




KS1461 pdf, 반도체, 판매, 대치품
KS1461
PRELIMINARY
RF SIGNAL PROCESSOR
Pin
No.
Pin Name
27 VREFLP_BGI
28 LDODVD
29 PDDVD
30 LDOCD
31 PDCD
www.DataSh3e2et4U.cAoGmND
33 FE
34 FEN
35 TEN
36 TE
37 PDLIMTRES
38 ABCDN
39 ABCD
40 ABCDI
41 ENVP
42 ENVB
43 ENV
44 DGND
45 FOKTH
46 FOKB
47 DFCT_CP1
48 DFCT_CP2
49 CC1
50 CC2
51 DVCC
52 DFCTTH2
53 DFCTTH1
54 DFCT1
55 DFCT2
56 DPDVCC
57 MIRR
58 BCA
Table 1. Pin Description
I/O
Description
Related Block
Related
Part
I Band gap voltage input block for ALPC
ALPC
-
O Optical Laser Diodes operation voltage output terminal for DVD ALPC
P/U
I Optical Laser Monitor Diode voltage input terminal for DVD
ALPC
P/U
O Optical Laser Diode operating voltage output terminal for CD
ALPC
P/U
I Optical Laser Monitor Diode voltage input terminal for CD
ALPC
P/U
P Power GND terminal for Analog Part
ANALOG
-
O FE AMP output terminal
FE AMP
DSSP
I Input terminal for selecting FE AMP Gain
FE AMP
-
I Input terminal for selecting TE AMP Gain
TE AMP
-
O TE AMP output terminal
TE AMP
DSSP
- Bias resistance terminal for PDLIMIT
DPD
-
I ABCD AMP for selecting Gain () input terminal
ABCD AMP
-
O ABCD AMP output terminal
ABCD AMP
-
I ABCD AC Coupling input terminal for servo monitor
SERVO MONIT -
- CAP connection terminal for selecting the RC value of Peak Hold RF ENV
for detecting RF Envelopes
- CAP connection terminal for selecting the RC value of Bottom
Hold for detecting RF Envelopes
RF ENV
O RF Envelope Detect Output terminal
RF ENV
-
-
DSSP
P Power GND input terminal for digital circuits
DIGITAL
-
I Focus OK comparating level input terminal
FOKB
-
O Focus OK comparator output terminal (L: Focus OK)
FOKB
DSSP
- Connection terminal for RC value of Peak Hold, for selecting the DFCT
maximum time for Servo signal
- Connection terminal for RC value of Peak Hold, for selecting the DFCT
minimum defect time for PLL
O Peak Hold Output terminal for selecting the minimum Defect time DFCT
for Defect
I Peak Hold AC Coupling Input terminal for Defect
DFCT
-
-
-
-
P Power voltage input terminal for digital circuit
DIGITAL
-
- Resistance connection terminal for selecting the Defect Comparat- DEFECT
ing Level for PLL
- Resistance connection terminal for selecting the Defect Comparat- DEFECT
ing Level for Servo
O Defect output terminal for Servo
DEFECT
-
-
DSSP
O Defect output terminal for PLL
DEFECT
PLL
P Power voltage input terminal for DPD TE
DPD
-
O Mirror output terminal
MIRR
DSSP
O BCA output terminal
BCA
DSP
LDI-97-P002-R2
4 98-02-10

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KS1461 전자부품, 판매, 대치품
PRELIMINARY
RF SIGNAL PROCESSOR
KS1461
ELECTRICAL CHARACTERISTICS
VCC = 5V, GND = 0V, Vc = 2.5V Ta = 25°C, Vc is center of standard output voltage.
Table 2. Electrical Characteristics
No Item
Symbol
Input
CIRCUIT CURRENT
1 Power Current ICC
www.DataSheeRt4FUS.cUoMm& AGC AMP
2 RF SUM AMP Vrfsum1
Voltage Gain
3 Vrfsum2
4 RF SUM AMP Frfsum1
Unit Gain Band-
5 width
Frfsum2
6 AGC
Voltage Gain
7
GAGC1
GAGC2
8 AGC Level
VAGC
ABCD SUM AMP
9 ABCD SUM
AMP Voltage
10 Gain
Vsum1
Vsum2
11 RF SUM AMP
-3dB Gain
12 Bandwidth
Fsum1
Fsum2
RF EQUALIZER
13 EQ Standard
Output
14 EQ Peak
15 Frequency
16
17
18
19
20 Group Delay
21 Variation
22
23
24
25
Vrfeq
Fpdvd1
Fpdvd2
Fpcd1
Fpcd2
Fpcd4
Fpcd8
tdvd1
tdvd2
tcd1
tcd2
tcd4
tcd8
No Signal
DVD: 1MHz
(A-D) dvd: 300mVpp
CD: 0.2MHz
(A-D) cd: 150mVpp
DVD: Frequency Sweep
(A-D) dvd: 300mVpp + 120mVdc
CD: Frequency Sweep
(A-D) cd: 150mVpp + 120mVdc
Each Mode Standard Input
AGCIN: 2.5V
Each Mode Standard Input
AGCIN: 0.5V
Each Mode Standard Input
AGCLEVEL = 3.5V
DVD: 100kHz
(A1~D1) dvd: 300mVpp + 150mVdc
CD: 100kHz
(A1~D1) cd: 150mVpp + 120mVdc
DVD: Frequency Sweep
(A1~D1) dvd: 300mVpp + 150mVdc
CD: Frequency Sweep
(A1~D1) cd: 150mVpp + 120mVdc
RFAGCO = 1Vpp
A ~ D: Standard Input Swept Sine
A ~ D: Standard input Swept Sine
Measurement Min. Typ. Max. Unit
Point
150 170 190 mA
RFAGCO
(AGCI=1.5V,
AGCHOLD=H)
0.8
1
1.2 Vpp
20
20
RFAGCO
(Standard Gain
Comparison)
6.0
-
RFAGCO
0.8
-
-
-
-
1
- MHz
- MHz
- dB
-6.0
1.2 Vpp
ABCD
(AGCI =1.5V,
AGCHOLD=H)
0.8
1
ABCD
4-
4-
1.2 Vpp
- MHz
- MHz
RFEQO
RFEQO
RFEQO
1.9 2.0 2.1 Vpp
- 6.4 - MHz
- 12.8 -
- 1.3 -
- 2.6 -
- 5.2 -
- 10.4 -
- - ±3 ns
- - ±1.5
- - ±20
- - ±5
- - ±2.5
- - ±1.5
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부품번호상세설명 및 기능제조사
KS1461

RF Signal Processor

Samsung Semiconductor
Samsung Semiconductor

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