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PDF AS7C33128PFD36A Data sheet ( Hoja de datos )

Número de pieza AS7C33128PFD36A
Descripción (AS7C33128PFD32A / AS7C33128PFD36A) 3.3V 128K X 32/36 pipeline burst synchronous SRAM
Fabricantes Alliance Semiconductor Corporation 
Logotipo Alliance Semiconductor Corporation Logotipo



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No Preview Available ! AS7C33128PFD36A Hoja de datos, Descripción, Manual

March 2001
AS7C33128PFD32A
AS7C33128PFD36A
®
3.3V 128K × 32/36 pipeline burst synchronous SRAM
Features
• Organization: 131,072 words × 32 or 36 bits
• Fast clock speeds to 166 MHz in LVTTL/LVCMOS
• Fast clock to data access: 3.5/3.8/4.0/5.0 ns
• Fast OE access time: 3.5/3.8/4.0/5.0 ns
• Fully synchronous register-to-register operation
• Single register “Flow-through” mode
• Dual-cycle deselect
- Single-cycle deselect also available (AS7C33128PFS32A/
www.DataSheet4AUS.c7oCm33128PFS36A)
• Pentium®* compatible architecture and timing
• Asynchronous output enable control
• Economical 100-pin TQFP package
• Byte write enables
• Multiple chip enables for easy expansion
• 3.3 core power supply
• 2.5V or 3.3V I/O operation with separate VDDQ
• 30 mW typical standby power in power down mode
• NTD™* pipeline architecture available
(AS7C33128KNTD32A/ AS7C33128NTD36A)
Logic block diagram
Pin arrangement
CLK
ADV
ADSC
ADSP
A[16:0]
GWE
BWE
BWd
BWc
BWb
BWa
CE0
CE1
CE2
ZZ
OE
LBO
CLK
CE
Q0
Burst logic
CLR
17 D
Q1 128K × 32/36
Q 17 15 17
Memory
array
CE
Address
register
CLK
D DQd Q
Byte write
registers
CLK
D DQc Q
Byte write
registers
CLK
D DQb Q
Byte write
registers
CLK
D DQa Q
Byte write
registers
CLK
36/32
36/32
4
Power
down
DQ
Enable
CE register
CLK
D Enable Q
delay
register
CLK
OE
Output
registers
CLK
Input
registers
CLK
FT DATA [35:0]
DATA [31:0]
DQPc/NC
DQc
DQc
VDDQ
VSSQ
DQc
DQc
DQc
DQc
VSSQ
VDDQ
DQc
DQc
FT
VDD
NC
VSS
DQd
DQd
VDDQ
VSSQ
DQd
DQd
DQd
DQd
VSSQ
VDDQ
DQd
DQd
DQPd/NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
TQFP 14 × 20 mm
80 DQPb/NC
79 DQb
78 DQb
77 VDDQ
76 VSSQ
75 DQb
74 DQb
73 DQb
72 DQb
71 VSSQ
70 VDDQ
69 DQb
68 DQb
67 VSS
66 NC
65 VDD
64 ZZ
63 DQa
62 DQa
61 VDDQ
60 VSSQ
59 DQa
58 DQa
57 DQa
56 DQa
55 VSSQ
54 VDDQ
53 DQa
52 DQa
51 DQPa/NC
Note: Pins 1,30,51,80 are NC for ×32
Selection guide
Minimum cycle time
Maximum clock frequency
Maximum pipelined clock access time
Maximum operating current
Maximum standby current
Maximum CMOS standby current (DC)
–166
6
166
3.5
475
130
30
–150
6.7
150
3.8
450
110
30
–133
7.5
133
4
425
100
30
–100
10
100
5
325
90
30
Units
ns
MHz
ns
mA
mA
mA
*Pentium® is a registered trademark of Intel Corporation. NTD™ is a trademark of Alliance Semiconductor Corporation. All trademarks mentioned in this document are
the property of their respective owners.
3/22/01; v.1.0
Alliance Semiconductor
P. 1 of 11
Copyright © Alliance Semiconductor. All rights reserved.

1 page




AS7C33128PFD36A pdf
AS7C33128PFD32A
AS7C33128PFD36A
®
TQFP thermal resistance
Description
Thermal resistance
(junction to ambient)*
Thermal resistance
(junction to top of case)*
* This parameter is sampled.
Conditions
Test conditions follow standard test
methods and procedures for measuring
thermal impedance, per EIA/JESD51
Symbol
θJA
θJC
Typical
40
8
Units
°C/W
°C/W
DC electrical characteristics
www.DataSheet4U.com
–166
–150
–133
–100
Parameter
Symbol
Test conditions
Min Max Min Max Min Max Min Max Unit
Input leakage
current*
|ILI| VDD = Max, VIN = GND to VDD – 2 – 2 – 2 – 2 µA
Output leakage
current
Operating power
supply current
Standby power
supply current
Output voltage
|ILO|
OE VIH, VDD = Max,
VOUT = GND to VDD
– 2 – 2 – 2 – 2 µA
ICC
CE0 = VIL, CE1 = VIH, CE2 = VIL,
f = fMax, IOUT = 0 mA
475
450
425
325 mA
ISB Deselected, f = fMax, ZZ VIL – 130 – 110 – 100 – 90
ISB1
Deselected, f = 0, ZZ 0.2V
all VIN 0.2V or VDD – 0.2V
30
30
– 30
30 mA
ISB2
Deselected, f = fMax, ZZ VDD – 0.2V
All VIN VIL or VIH
30
30
30
30
VOL
IOL = 8 mA, VDDQ = 3.465V
– 0.4 – 0.4 – 0.4 – 0.4
V
VOH IOH = –4 mA, VDDQ = 3.135V 2.4 – 2.4 – 2.4 – 2.4 –
* LBO pin has an internal pull-up and input leakage = ±10 µa.
Note: ICC given with no output loading. ICC increases with faster cycles times and greater output loading.
DC electrical characteristics for 2.5V I/O operation
Parameter
Output leakage
current
Output voltage
Symbol
|ILO|
VOL
VOH
Test conditions
OE VIH, VDD = Max,
VOUT = GND to VDD
IOL = 2 mA, VDDQ = 2.65V
IOH = –2 mA, VDDQ = 2.35V
–166
–150
–133
–100
Min Max Min Max Min Max Min Max Unit
–1 1 –1 1 –1 1 –1 1 µA
– 0.7 – 0.7 – 0.7 – 0.7
V
1.7 – 1.7 – 1.7 – 1.7 –
3/22/01; v.1.0
Alliance Semiconductor
P. 5 of 11

5 Page





AS7C33128PFD36A arduino
Ordering information
–166 MHz
AS7C33128PFD32A-166TQC
AS7C33128PFD32A-166TQI
AS7C33128PFD36A-166TQC
AS7C33128PFD36A-166TQI
AS7C33128PFD32A
AS7C33128PFD36A
®
–150 MHz
AS7C33128PFD32A-150TQC
AS7C33128PFD32A-150TQI
AS7C33128PFD36A-150TQC
AS7C33128PFD36A-150TQI
–133 MHz
AS7C33128PFD32A-133TQC
AS7C33128PFD32A-133TQI
AS7C33128PFD36A-133TQC
AS7C33128PFD36A-133TQI
–100 MHz
AS7C33128PFD32A-100TQC
AS7C33128PFD32A-100TQI
AS7C33128PFD36A-100TQC
AS7C33128PFD36A-100TQI
Part numbering guide
www.DataSheet4U.coAmS7C
33
12
128
3
PF
4
D 32/36 A
567
1.Alliance Semiconductor SRAM prefix
2.Operating voltage: 33=3.3V
3.Organization: 128=128K
4.Pipeline-Flowthrough (each device works in both modes)
5.Deselect: D=Dual cycle deselect
6.Organization: 32=x32; 36=x36
7.Production version: A=first production version
8.Clock speed (MHz)
9.Package type: TQ=TQFP
10.Operating temperature: C=Commercial (0° C to 70° C); I=Industrial (-40° C to 85° C)
–XXX
8
TQ
9
C/I
10
3/22/01; v.1.0
Alliance Semiconductor
P. 11 of 11
© Copyright Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names
may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors
that may appear in this document. The data contained herein represents Alliance’s best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time, without
notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information
for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or liability arising out of the
application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a
particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance’s Terms and Conditions of Sale (which are available from Alliance). All sales of
Alliance products are made exclusively according to Alliance’s Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under any patent rights, copyrights, mask
works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a
malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk
of such use and agrees to indemnify Alliance against all claims arising from such use.

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