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PDF 74V2T86 Data sheet ( Hoja de datos )
| Número de pieza | 74V2T86 | |
| Descripción | DUAL 2-INPUT EXCLUSIVE OR GATE | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 74V2T86 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
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74V2T86
DUAL 2-INPUT EXCLUSIVE OR GATE
s HIGH SPEED: tPD = 4.8ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1µA(MAX.) at TA = 25°C
www.DataSheet4U.csomCOMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V (MAX)
s POWER DOWN PROTECTION ON INPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8mA (MIN) at VCC = 4.5V
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 4.5V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V2T86 is an advanced high-speed CMOS
DUAL 2-INPUT EXCLUSIVE OR GATE fabricated
with sub-micron silicon gate and double-layer
metal wiring C2MOS technology.
SOT23-8L
ORDER CODES
PACKAGE
SOT23-8L
T&R
74V2T86STR
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2003
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1 page  
DIM.
A
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A1
A2
b
C
D
E
E1
e
e1
L
SOT23-8L MECHANICAL DATA
MIN.
0.90
0.00
0.90
0.22
0.09
2.80
2.60
1.50
0
0.35
mm.
TYP
.65
1.95
MAX.
1.45
0.15
1.30
0.38
0.20
3.00
3.00
1.75
MIN.
35.4
0.0
35.4
8.6
3.5
110.2
102.3
59.0
0.55 13.7
mils
TYP.
25.6
76.7
74V2T86
MAX.
57.1
5.9
51.2
14.9
7.8
118.1
118.1
68.8
21.6
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5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet 74V2T86.PDF ] | |
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