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PDF ISL9107 Data sheet ( Hoja de datos )
| Número de pieza | ISL9107 | |
| Descripción | (ISL9107 / ISL9108) 1.5A 1.6MHz Low Quiescent Current High Efficiency Synchronous Buck Regulator | |
| Fabricantes | Intersil Corporation | |
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Data Sheet
ISL9107, ISL9108
December 21, 2007
FN6612.0
1.5A 1.6MHz Low Quiescent Current High
Efficiency Synchronous Buck Regulator
ISL9107 and ISL9108 are 1.6MHz synchronous step-down
regulators with integrated power switches capable of
delivering 1.5A output current, which is ideal for powering
low-voltage microprocessors in compact devices such as
PDAs and cellular phones. These devices are optimized for
generating low output voltages down to 0.8V. The supply
voltage range is from 2.7V to 5.5V allowing for the use of a
www.DataSheseint4gUle.cLoim+ cell, three NiMH cells or a regulated 5V input.
1.6MHz pulse-width modulation (PWM) switching frequency
allows using small external components. They have flexible
operation mode selection of forced PWM mode and Skip
(Low IQ) mode with typical 17μA quiescent current for
highest light load efficiency to maximize battery life.
The ISL9107 and ISL9108 integrate a pair of low
ON-resistance P-Channel and N-Channel MOSFETs to
maximize efficiency and minimize external component
count.
The ISL9107 offers a typical 215ms Power-Good (PG) timer
when powered up. The timer output can be reset by RSI.
When shutdown, ISL9107 and ISL9108 discharge the output
capacitor. Other features include internal digital soft-start,
enable for power sequence, overcurrent protection, and
thermal shutdown.
The ISL9107 and ISL9108 are offered in 8 Ld 2mmx3mm
DFN package with 0.9mm typical height. The complete
converter can occupy less than 1cm2 area.
Ordering Information
PART
NUMBER
(Note)
TEMP.
PART RANGE
MARKING (°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL9107IRZ-T 107
-40 to +85 8 Ld 2x3 DFN L8.2x3
ISL9108IRZ-T 108
-40 to +85 8 Ld 2x3 DFN L8.2x3
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
Features
• Integrated Synchronous Buck Regulator with up to 95%
Efficiency
• 2.7V to 5.5V Supply Voltage
• 1.5A Guaranteed Output Current
• 17μA Quiescent Supply Current in Skip (Low IQ) Mode
• Selectable Forced PWM Mode and Skip Mode
• Less Than 1µA Logic Controlled Shutdown Current
• 100% Maximum Duty Cycle for Lowest Dropout
• Discharge Output Capacitor when Shutdown
• Internal Digital Soft-Start
• Enable, Peak Current Limiting, Short Circuit Protection
• Over-Temperature Protection
• Power-Good Function (for ISL9107 only)
• 8 Ld 2mmx3mm DFN
• Pb-Free (RoHS Compliant)
Applications
• Single Li-Ion Battery-Powered Equipment
• DSP Core Power
• PDAs and Palmtops
Pinouts
ISL9107
(8 LD 2X3 DFN)
TOP VIEW
VIN 1
EN 2
PG 3
MODE 4
8 SW
7 GND
6 FB
5 RSI
ISL9108
(8 LD 2X3 DFN)
TOP VIEW
VIN 1
EN 2
NC 3
MODE 4
8 SW
7 GND
6 FB
5 NC
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL9107, ISL9108
Typical Operating Performance (Continued)
5V/DIV
1V/DIV
VSW
VOUT
1A/DIV
www.DataSheet54VU/D.cIoVm
IL
EN
200µs/DIV
FIGURE 6. SOFT-START (VIN = 4.2V, VOUT = 1.6V,
IOUT = 1.5A)
5V/DIV
50mV/DIV
VSW
VOUT (AC COUPLED)
200mA/DIV
IL
2µs/DIV
FIGURE 8. STEADY-STATE IN SKIP MODE (VIN = 5.0V,
VOUT = 1.6V, IOUT = 35mA)
VSW
5V/DIV
100mV/DIV
VOUT (AC COUPLED)
1A/DIV
IL
100µs/DIV
FIGURE 10. LOAD TRANSIENT TEST (MODE = VIN = 5.0V;
VO = 1.6V; IO = 0.01A~1A)
5
5V/DIV
1V/DIV
VSW
VOUT
500mA/DIV
5V/DIV
IL
EN
200µs/DIV
FIGURE 7. SOFT-START (VIN = 4.2V, VOUT = 1.6V,
IOUT = 1mA)
5V/DIV
20mV/DIV
VSW
VOUT (AC COUPLED)
1A/DIV
IL
1µs/DIV
FIGURE 9. STEADY-STATE IN PWM MODE (VIN = 5.0V,
VOUT = 1.6V, IOUT = 1.5A)
5V/DIV
100mV/DIV
VVSSWW
VOUT (AC COUPLED)
1A/DIV
IL
100µs/DIV
FIGURE 11. LOAD TRANSIENT TEST (MODE = GND,
VIN = 5.0V; VO = 1.6V; IO = 0.01A~1A)
FN6612.0
December 21, 2007
5 Page 
ISL9107, ISL9108
The rising edge of the PG output is delayed by 215ms
(typical) from the time the power-good signal is issued. This
function is provided on ISL9107 only.
Applications Information
Inductor and Output Capacitor Selection
To achieve better steady state and transient response,
typically a 2.2µH inductor can be used. The peak-to-peak
inductor current ripple can be expressed as in Equation 1:
VO
•
⎛
⎜
⎝
1
–
V-V----I-O-N--⎠⎟⎞
ΔI
=
--------------------------------------
L • fS
(EQ. 1)
www.DataSheInet4EUq.ucaotmion 1, usually the typical values can be used but to
have a more conservative estimation, the inductance should
consider the value with worst case tolerance; and for
switching frequency (fS), the minimum fS from the “Electrical
Specifications” table on page 2 can be used.
To select the inductor, its saturation current rating should be
at least higher than the sum of the maximum output current
and half of the delta calculated from Equation 1. Another
more conservative approach is to select the inductor with the
current rating higher than the P-Channel MOSFET peak
current limit.
Another consideration is the inductor DC resistance since it
directly affects the efficiency of the converter. Ideally, the
inductor with the lower DC resistance should be considered
to achieve higher efficiency.
Inductor specifications could be different from different
manufacturers so please check with each manufacturer if
additional information is needed.
For the output capacitor, a ceramic capacitor can be used
because of the low ESR values, which helps to minimize the
output voltage ripple. A typical value of 10µF/6.3V ceramic
capacitor should be enough for most of the applications and
the capacitor should be X5R or X7R.
Input Capacitor Selection
The main function for the input capacitor is to provide
decoupling of the parasitic inductance and to provide filtering
function to prevent the switching current from flowing back to
the battery rail. A 10µF/6.3V ceramic capacitor (X5R or X7R)
is a good starting point for the input capacitor selection.
Output Voltage Setting Resistor Selection
The voltage divider resistors (R2 and R3), as shown in
Figure 16, set the desired output voltage value. The output
voltage can be calculated using Equation 2:
VO
=
VFB
•
⎛
⎜
⎝
1
+
RR-----23- ⎠⎟⎞
(EQ. 2)
where VFB is the feedback voltage (typically it is 0.8V). The
current flowing through the voltage divider resistors can be
calculated as VO/(R2 + R3), so larger resistance is desirable
to minimize this current. On the other hand, the FB pin has
leakage current that will cause error in the output voltage
setting. The leakage current has a typical value of 0.1µA. To
minimize the accuracy impact on the output voltage, select
the R3 no larger than 200kΩ.
C3 (shown in Figure 16) is highly recommended to be added
for improving stability and achieving better transient
response. C3 can be calculated using Equation 3:
C3 = -2----×-----π-----×-----R----2-1----×-----7---.--3---k----H-----z-
(EQ. 3)
Table 1 provides the recommended component values for
some output voltage options.
Layout Recommendation
The PCB layout is a very important converter design step to
make sure the designed converter works well, especially
under the high current, high switching frequency condition.
For ISL9107 and ISL9108, the power loop is composed of
the output inductor (L), the output capacitor (COUT), the SW
pin and the GND pin. It is necessary to make the power loop
as small as possible and the connecting traces among them
should be direct, short and wide; the same type of traces
should be used to connect the VIN pin, the input capacitor
CIN and its ground. The switching node of the converter, the
SW pin, and the traces connected to this node are very
noisy, so keep the voltage feedback trace and other noise
sensitive traces away from these noisy traces.
The input capacitor should be placed as close as possible to
the VIN pin. The ground of the input and output capacitors
should be connected as close as possible as well.
The heat of the IC is mainly dissipated through the thermal
pad. Maximizing the copper area connected to the thermal
pad is preferable. In addition, a solid ground plane is helpful
for EMI performance.
TABLE 1. ISL9107 AND ISL9108 RECOMMENDED CIRCUIT
CONFIGURATION vs VOUT
VOUT (V) L (µH)
0.8 2.2
C2 (µF)
10
R2 (kΩ)
0
C3 (pF)
N/A
R3 (kΩ)
100
1.0 2.2 10 44.2 470 178
1.2 2.2 10 80.6 270 162
1.5 2.2 10 84.5 270 97.6
1.8 2.2 10 100 220 80.6
2.5 2.2~3.3 10~22
100
220
47.5
2.8 2.2~3.3 10~22
100
220
40.2
3.3 2.2~3.3 10~22
102
220
32.4
11 FN6612.0
December 21, 2007
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ISL9107.PDF ] | |
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