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PDF STA5620 Data sheet ( Hoja de datos )

Número de pieza STA5620
Descripción Fully integrated RF front-end receiver
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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No Preview Available ! STA5620 Hoja de datos, Descripción, Manual

STA5620
Fully integrated RF front-end for GPS
Preliminary Data
Features
Low IF architecture (fIF = 4fO)
www.DataSheet4U.comMinimum external components
VGA gain internally regulated
On chip programmable PLL
Typ. 2.7V supply voltage
SPI interface
2kV HBM ESD protected
Compatible with GPS L1
Standard QFN-32 package
Low power for portable designs
Description
The chip is a fully integrated RF front-end able to
down-convert the GPS L1 signal from
1575.42MHz to 4.092MHz.
The IF signal is converted by a two bit ADC. Sign
(SIGN), Magnitude (MAG) and the 16.368MHz
sampling clock (GPS_CLK) are provided to the
baseband.
VFQFPN-32L
The magnitude data is internally integrated in
order to control the variable gain amplifiers in
accordance to the RF input signal strength.
An excellent quality of reception in critical
environments is ensured by the good noise figure
and linearity of the receiver.
The on-chip oscillator supports crystal
frequencies in the range of 10MHz to 40MHz. It is
able to support TCXO providing also a buffered
copy of the oscillator frequency.
The chip, using STMicroelectronics BiCMOS
SiGe technology, is housed in a QFN-32 package.
Table 1. Device summary
Order code
STA5620TR
Marking
STA5620
Package
VFQFPN-32L
Packing
Tape & reel
July 2007
Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
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STA5620 pdf
STA5620
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
www.DataSheet4UF.ciogmure 8.
Figure 9.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pins connection diagram (bottom view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
SPI byte write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
SPI byte read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Chip enable and reset timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
VFQFPN 32L (5x5x1.0mm) mechanical data and package dimensions . . . . . . . . . . . . . . 25
Reel, leader and trailer dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Carrier tape requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
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STA5620 arduino
STA5620
Functional description
3.9
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Power control modes
Three different power control modes can be chosen by means of the CHIP_EN and the
RF_EN pins. If the CHIP_EN pin is forced low the device goes to stand-by mode with very
low power consumption. On the other hand, if CHIP_EN is set high, two scenarios are
possible:
1. IIf RF_EN = 0 the crystal oscillator and only one output buffer are enabled,
XTAL_CLK if MODE = 1 or GPS_CLK if MODE = 0;
2. If RF_EN = 1 the whole chip is active and functional.
Only if MODE = 0 the XTAL_CLK output is disabled.
A logic reset of the SPI registers is generated by the low to high transitions of the CHIP_EN
pin. External pin strapping dominates until some SPI commands reverse the priority and
overrides the strapping until next reset.
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