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PDF AT17F040 Data sheet ( Hoja de datos )
| Número de pieza | AT17F040 | |
| Descripción | (AT17F040 / AT17F080) FPGA Configuration Flash Memory | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AT17F040 (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
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Features
• Prowgwrwam.DmataaSbhleee4t4,1U9.c4o,3m04 x 1 and 8,388,608 x 1-bit Serial Memories Designed to Store
Configuration Programs for Field Programmable Gate Arrays (FPGAs)
• 3.3V Output Capability
• 5V Tolerant I/O Pins
• Program Support using the Atmel ATDH2200E System or Industry Third-party
Programmers
• In-System Programmable (ISP) via 2-wire Bus
• Simple Interface to SRAM FPGAs
• Compatible with Atmel AT40K and AT94K Devices, Altera® FLEX®, APEX™ Devices,
Lucent® ORCA® FPGAs, Xilinx® XC3000, XC4000, XC5200, Spartan®, Virtex® FPGAs,
Motorola® MPA1000 FPGAs
• Cascadable Read-back to Support Additional Configurations or Higher-density Arrays
• Low-power CMOS FLASH Process
• Available in 6 mm x 6 mm x 1 mm 8-lead LAP (Pin-compatible with 8-lead SOIC/VOIC
Packages), 20-lead PLCC and 44-lead TQFP Packages
• Emulation of Atmel’s AT24CXXX Serial EEPROMs
• Low-power Standby Mode
• Single Device Capable of Holding 4-bit Stream Files Allowing Simple System
Reconfiguration
• Fast Serial Download Speeds up to 33 MHz
• Endurance: 5,000 Write Cycles Typical
• Green (Pb/Halide-free/RoHS Compliant) Package Options Available
FPGA
Configuration
Flash Memory
AT17F040
AT17F080
1. Description
The AT17F Series of In-System Programmable Configuration PROMs (Configurators)
provide an easy-to-use, cost-effective configuration memory for Field Programmable
Gate Arrays. The AT17F Series device is packaged in the 8-lead LAP, 20-lead PLCC,
and 44-lead TQFP, see Table 1-1. The AT17F Series Configurator uses a simple
serial-access procedure to configure one or more FPGA devices.
The AT17F Series Configurators can be programmed with industry-standard program-
mers, Atmel’s ATDH2200E Programming Kit or Atmel’s ATDH2225 ISP Cable.
Table 1-1. AT17F Series Packages
Package
AT17F040
8-lead LAP
Yes
20-lead PLCC
Yes
44-lead TQFP
–
AT17F080
Yes
Yes
Yes
3039K–CNFG–2/08
1 page  
AT17F040/080
5. Pin Description
www.DataSheet4U.com
Table 5-1. Pin Description
Name
DATA
CLK
PAGE_EN
PAGESEL0
PAGESEL1
RESET/OE
CE
GND
CEO
A2
READY
SER_EN
VCC
8
I/O LAP
I/O 1
I2
I–
I–
I–
I3
I4
–5
O
6
I
O–
I7
–8
AT17F040
20
PLCC
2
4
16
11
7
6
8
10
14
15
17
20
20 PLCC
(Virtex)
1
3
–
–
–
8
10
11
13
15
18
20
8
LAP
1
2
–
–
–
3
4
5
6
–
7
8
AT17F080
20
PLCC
2
4
16
11
7
6
8
10
14
15
17
20
44
TQFP
40
43
39
14
19
13
15
18
21
23
35
38
5.1 DATA(1)
Three-state DATA output for configuration. Open-collector bi-directional pin for programming.
5.2 CLK(1)
Clock input. Used to increment the internal address and bit counter for reading and
programming.
5.3 PAGE_EN(2)
Input used to enable page download mode. When PAGE_EN is high the configuration download
address space is partitioned into 4 equal pages. This gives users the ability to easily store and
retrieve multiple configuration bitstreams from a single configuration device. This input works in
conjunction with the PAGESEL inputs. PAGE_EN must be remain low if paging is not desired.
When SER_EN is Low (ISP mode) this pin has no effect.
Notes: 1. This pin has an internal 20 KΩ pull-up resistor.
2. This pin has an internal 30 KΩ pull-down resistor.
3039K–CNFG–2/08
5
5 Page 
AT17F040/080
16. AC Characteristics
www.DataSheet4U.com
Symbol Description
TOE(2)
OE to Data Delay
TCE(2)
CE to Data Delay
TCAC(2)
CLK to Data Delay
TOH Data Hold from CE, OE, or CLK
TDF(3)
CE or OE to Data Float Delay
TLC CLK Low Time
THC
TSCE
THCE
THOE
FMAX
FMAX
TWR
TEC
CLK High Time
CE Setup Time to CLK
(to guarantee proper counting)
CE Hold Time from CLK
(to guarantee proper counting)
RESET/OE Low Time
(guarantees counter is reset)
Maximum Input Clock Frequency
SEREN = 0
Maximum Input Clock Frequency
SEREN = 1
Write Cycle Time(4)
Erase Cycle Time(4)
Commercial
Industrial(1)
Commercial
Industrial(1)
Commercial
Industrial(1)
Commercial
Industrial(1)
Commercial
Industrial(1)
Commercial
Industrial(1)
Commercial
Industrial(1)
Commercial
Industrial(1)
Commercial
Industrial(1)
Commercial
Industrial(1)
Commercial
Industrial(1)
Commercial
Industrial(1)
Commercial
Industrial(1)
Commercial
Industrial(1)
AT17F040/080
Min Max
50
55
55
60
3 30
30
0
0
15
15
15
15
15
15
20
25
0
0
20
20
10
10
33
33
12
12
13
13
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
µs
µs
s
s
Notes:
1. Preliminary specifications for military operating range only.
2. AC test lead = 50 pF.
3. Float delays are measured with 5 pF AC loads. Transition is measured ± 200 mV from steady-state active levels.
4. See the AT17F Programming Specfication for procedural information.
3039K–CNFG–2/08
11
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet AT17F040.PDF ] | |
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