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AT49BV640DT 데이터시트 PDF




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부품번호 AT49BV640DT 기능
기능 64-megabit (4M x 16) 3-volt Only Flash Memory
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AT49BV640DT 데이터시트, 핀배열, 회로
Features
Sinwgwlew.VDoalttaaSgheeeOt4pUe.rcaotmion Read/Write: 2.65V - 3.6V
Access Time – 70 ns
Sector Erase Architecture
– One Hundred Twenty-seven 32K Word (64K Bytes) Main Sectors with
Individual Write Lockout
– Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout
Fast Word Program Time – 10 µs
Typical Sector Erase Time: 32K Word Sectors – 700 ms; 4K Word Sectors – 100 ms
Suspend/Resume Feature for Erase and Program
– Supports Reading and Programming Data from Any Sector by Suspending
Erase of a Different Sector
– Supports Reading Any Word by Suspending Programming of Any Other Word
Low-power Operation
– 10 mA Active
– 15 µA Standby
VPP Pin for Write Protection and Accelerated Program Operation
WP Pin for Sector Protection
RESET Input for Device Initialization
Flexible Sector Protection
Top or Bottom Boot Block Configuration Available
128-bit Protection Register
Minimum 100,000 Erase Cycles
Common Flash Interface (CFI)
Green (Pb/Halide-free/RoHS Compliant) Packaging
64-megabit
(4M x 16)
3-volt Only
Flash Memory
AT49BV640D
AT49BV640DT
1. Description
The AT49BV640D(T) is a 2.7-volt 64-megabit Flash memory organized as 4,194,304
words of 16 bits each. The memory is divided into 135 sectors for erase operations.
The device is offered in a 48-ball CBGA package. The device has CE and OE control
signals to avoid any bus contention. This device can be read or reprogrammed using
a single power supply, making it ideally suited for in-system programming.
The device powers on in the read mode. Command sequences are used to place
the device in other operation modes such as program and erase. The device has
the capability to protect the data in any sector (see “Flexible Sector Protection” on
page 6).
To increase the flexibility of the device, it contains an Erase Suspend and Program
Suspend feature. This feature will put the erase or program on hold for any amount of
time and let the user read data from or program data to any of the remaining sectors
within the memory.
The VPP pin provides data protection. When the VPP input is below 0.4V, the program
and erase functions are inhibited. When VPP is at 1.65V or above, normal program
and erase operations can be performed. With VPP at 10.0V, the program (Dual-word
Program command) operation is accelerated.
3608C–FLASH–11/06




AT49BV640DT pdf, 반도체, 판매, 대치품
4.3 Reset
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A RESET input pin is provided to ease some system applications. When RESET is at a logic
high level, the device is in its standard operating mode. A low level on the RESET pin halts the
present device operation and puts the outputs of the device in a high-impedance state. When
a high level is reasserted on the RESET pin, the device returns to read mode.
4.4 Erase
Before a word can be reprogrammed it must be erased. The erased state of the memory bits is
a logical “1”. The individual sectors can be erased by using the Sector Erase command.
4.4.1
Sector Erase
The device is organized into 135 sectors (SA0 - SA134) that can be individually erased. The
Sector Erase command is a two-bus cycle operation. The sector address and the D0H Data
Input command are latched on the rising edge of WE. The sector erase starts after the rising
edge of WE of the second cycle provided the given sector has not been protected. The erase
operation is internally controlled; it will automatically time to completion. The maximum time to
erase a sector is tSEC. An attempt to erase a sector that has been protected will result in the
operation terminating immediately.
4.5 Word Programming
Once a memory sector is erased, it is programmed (to a logical “0”) on a word-by-word basis.
Programming is accomplished via the Internal Device command register and is a two-bus
cycle operation. The device will automatically generate the required internal program pulses.
Any commands except Read Status Register, Program Suspend and Program Resume writ-
ten to the chip during the embedded programming cycle will be ignored. If a hardware reset
happens during programming, the data at the location being programmed will be corrupted.
Please note that a data “0” cannot be programmed back to a “1”; only erase operations can
convert “0”s to “1”s. Programming is completed after the specified tBP cycle time. If the pro-
gram status bit is a “1”, the device was not able to verify that the program operation was
performed successfully. The status register indicates the programming status. While the pro-
gram sequence executes, status bit I/O7 is “0”.
4.6 VPP Pin
The circuitry of the AT49BV640D(T) is designed so that the device cannot be programmed or
erased if the VPP voltage is less that 0.4V. When VPP is at 1.65V or above, normal program
and erase operations can be performed. The VPP pin cannot be left floating.
4 AT49BV640D(T)
3608C–FLASH–11/06

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AT49BV640DT 전자부품, 판매, 대치품
AT49BV640D(T)
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Table 4-2.
VPP
VCC/5V
VCC/5V
VCC/5V
VCC/5V
VCC/5V
VCC/5V
VCC/5V
VIL
Hardlock and Softlock Protection Configurations in Conjunction with WP
Hard-
Soft-
WP lock
lock
Erase/
Prog
Allowed?
Comments
00
0
Yes No sector is locked
00
1
No
Sector is Softlocked. The Unlock
command can unlock the sector.
01
1
Hardlock protection mode is
No enabled. The sector cannot be
unlocked.
10
0
Yes No sector is locked.
10
1
No
Sector is Softlocked. The Unlock
command can unlock the sector.
11
0
Hardlock protection mode is
Yes overridden and the sector is not
locked.
11
1
Hardlock protection mode is
No overridden and the sector can be
unlocked via the Unlock command.
xx
x
No
Erase and Program Operations
cannot be performed.
Figure 4-1. Sector Locking State Diagram
UNLOCKED
LOCKED
WP = VIL = 0
[000]
60h/
D0h
60h/2Fh
60h/01h
[001]
60h/
2Fh
Power-Up/Reset
Default
[011]
Hardlocked
WP = VIH = 1
[110]
[100]
60h/D0h
60h/
D0h
60h/
01h
[111]
Hardlocked is disabled by
WP = VIH
60h/
2Fh
60h/
01h
60h/
2Fh
Power-Up/Reset
Default
[101]
3608C–FLASH–11/06
60h/D0h = Unlock Command
60h/01h = Softlock Command
60h/2Fh = Hardlock Command
Note: 1. The notation [X, Y, Z] denotes the locking state of a sector. The current locking state of a
sector is defined by the state of WP and the two bits of the sector-lock status D[1:0].
7

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관련 데이터시트

부품번호상세설명 및 기능제조사
AT49BV640D

64-megabit (4M x 16) 3-volt Only Flash Memory

ATMEL Corporation
ATMEL Corporation
AT49BV640DT

64-megabit (4M x 16) 3-volt Only Flash Memory

ATMEL Corporation
ATMEL Corporation

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