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AT49BV642D 데이터시트 PDF




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부품번호 AT49BV642D 기능
기능 64-megabit (4M x 16) 3-volt Only Flash Memory
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AT49BV642D 데이터시트, 핀배열, 회로
Features
Sinwgwlew.VDoalttaaSgheeeOt4pUe.rcaotmion Read/Write: 2.65V - 3.6V
2.7V - 3.6V Read/Write
Access Time – 70 ns
Sector Erase Architecture
– One Hundred Twenty-seven 32K Word Main Sectors with Individual Write Lockout
– Eight 4K Word Sectors with Individual Write Lockout
Fast Word Program Time – 10 µs
Typical Sector Erase Time: 32K Word Sectors – 500 ms; 4K Word Sectors – 100 ms
Suspend/Resume Feature for Erase and Program
– Supports Reading and Programming Data from Any Sector by Suspending Erase
of a Different Sector
– Supports Reading Any Word by Suspending Programming of Any Other Word
Low-power Operation
– 10 mA Active
– 15 µA Standby
Data Polling and Toggle Bit for End of Program Detection
VPP Pin for Write Protection and Accelerated Program Operations
RESET Input for Device Initialization
Sector Lockdown Support
TSOP Package
Top or Bottom Boot Block Configuration Available
128-bit Protection Register
Common Flash Interface (CFI)
Green (Pb/Halide-free) Packaging
64-megabit
(4M x 16)
3-volt Only
Flash Memory
AT49BV642D
AT49BV642DT
1. Description
The AT49BV642D(T) is a 2.7-volt 64-megabit Flash memory organized as 4,194,304
words of 16 bits each. The memory is divided into 135 sectors for erase operations.
The device can be read or reprogrammed off a single 2.7V power supply, making it
ideally suited for in-system programming.
To increase the flexibility of the device, it contains an Erase Suspend and Program
Suspend feature. This feature will put the erase or program on hold for any amount of
time and let the user read data from or program data to any of the remaining sectors.
The end of program or erase is detected by Data Polling or toggle bit.
The VPP pin provides data protection and faster programming times. When the VPP
input is below 0.4V, the program and erase functions are inhibited. When VPP is at
1.65V or above, normal program and erase operations can be performed. With VPP at
10.0V, the program (dual-word program command) operation is accelerated.
A six-word command (Enter Single Pulse Program Mode) to remove the requirement
of entering the three-word program sequence is offered to further improve program-
ming time. After entering the six-word code, only single pulses on the write control
lines are required for writing into the device. This mode (Single Pulse Word Program)
is exited by powering down the device, by taking the RESET pin to GND or by a high-
to-low transition on the VPP input. Erase, Erase Suspend/Resume, Program Sus-
pend/Resume and Read Reset commands will not work while in this mode; if entered
they will result in data being programmed into the device. It is not recommended that
the six-word code reside in the software of the final product but only exist in external
programming code.
3631A–FLASH–04/06




AT49BV642D pdf, 반도체, 판매, 대치품
3.5 Word Programming
www.DataSheet4U.com The device is programmed on a word-by-word basis. Programming is accomplished via the
internal device command register and is a four-bus cycle operation. The programming address
and data are latched in the fourth cycle. The device will automatically generate the required
internal programming pulses. Please note that a “0” cannot be programmed back to a “1”; only
erase operations can convert “0”s to “1”s.
3.6 Sector Lockdown
Each sector has a programming lockdown feature. This feature prevents programming of data in
the designated sectors once the feature has been enabled. These sectors can contain secure
code that is used to bring up the system. Enabling the lockdown feature will allow the boot code
to stay in the device while data in the rest of the device is updated. This feature does not have to
be activated; any sector’s usage as a write-protected region is optional to the user.
At power-up or reset, all sectors are unlocked. To activate the lockdown for a specific sector, the
six-bus cycle Sector Lockdown command must be issued. Once a sector has been locked down,
the contents of the sector is read-only and cannot be erased or programmed.
3.6.1
Sector Lockdown Detection
A software method is available to determine if programming of a sector is locked down. When
the device is in the software product identification mode (see “Software Product Identification
Entry/Exit” sections on page 23), a read from address location 00002H within a sector will show
if programming the sector is locked down. If the data on I/O0 is low, the sector can be pro-
grammed; if the data on I/O0 is high, the program lockdown feature has been enabled and the
sector cannot be programmed. The software product identification exit code should be used to
return to standard operation.
3.6.2
Sector Lockdown Override
The only way to unlock a sector that is locked down is through reset or power-up cycles. After
power-up or reset, the content of a sector that is locked down can be erased and reprogrammed.
3.7 Program/Erase Status
The device provides several bits to determine the status of a program or erase operation: I/O2,
I/O3, I/O5, I/O6, and I/O7. All other status bits are don’t care. The “Status Bit Table” on page 10
and the following four sections describe the function of these bits. To provide greater flexibility
for system designers, the AT49BV642D(T) contains a programmable configuration register. The
configuration register allows the user to specify the status bit operation. The configuration regis-
ter can be set to one of two different values, “00” or “01”. If the configuration register is set to
“00”, the part will automatically return to the read mode after a successful program or erase
operation. If the configuration register is set to a “01”, a Product ID Exit command must be given
after a successful program or erase operation before the part will return to the read mode. It is
important to note that whether the configuration register is set to a “00” or to a “01”, any unsuc-
cessful program or erase operation requires using the Product ID Exit command to return the
device to read mode. The default value (after power-up) for the configuration register is “00”.
Using the four-bus cycle set configuration register command as shown in the “Command Defini-
tion Table” on page 11, the value of the configuration register can be changed. Voltages applied
to the reset pin will not alter the value of the configuration register. The value of the configuration
register will affect the operation of the I/O7 status bit as described below.
4 AT49BV642D(T)
3631A–FLASH–04/06

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AT49BV642D 전자부품, 판매, 대치품
AT49BV642D(T)
3.11 Common Flash Interface (CFI)
www.DataSheet4U.com Common Flash Interface (CFI) is a published, standardized data structure that may be read from
a Flash device. CFI allows system software to query the installed device to determine the config-
urations, various electrical and timing parameters, and functions supported by the device. CFI is
used to allow the system to learn how to interface to the Flash device most optimally. The two
primary benefits of using CFI are ease of upgrading and second source availability. The com-
mand to enter the CFI Query mode is a one-bus cycle command which requires writing data 98h
to address 55h. The CFI Query command can be written when the device is ready to read data
or can also be written when the part is in the product ID mode. Once in the CFI Query mode, the
system can read CFI data at the addresses given in the “Common Flash Interface Definition
Table” on page 24. To exit the CFI Query mode, the product ID exit command must be given.
3.12
Hardware Data Protection
Hardware features protect against inadvertent programs to the AT49BV642D(T) in the following
ways: (a) VCC sense: if VCC is below 1.8V (typical), the program function is inhibited. (b) VCC
power-on delay: once VCC has reached the VCC sense level, the device will automatically time-
out 10 ms (typical) before programming. (c) Program inhibit: holding any one of OE low, CE high
or WE high inhibits program cycles. (d) VPP is less than VILPP.
3.13
Input Levels
While operating with a 2.65V to 3.6V power supply, the address inputs and control inputs (OE,
CE and WE) may be driven from 0 to 5.5V without adversely affecting the operation of the
device. The I/O lines can be driven from 0 to VCCQ + 0.6V.
3.14
Output Levels
For the AT49BV642D(T), output high levels are equal to VCCQ - 0.1V (not VCC). For 2.65V to
3.6V output levels, VCCQ must be tied to VCC.
3631A–FLASH–04/06
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관련 데이터시트

부품번호상세설명 및 기능제조사
AT49BV642D

64-megabit (4M x 16) 3-volt Only Flash Memory

ATMEL Corporation
ATMEL Corporation
AT49BV642DT

64-megabit (4M x 16) 3-volt Only Flash Memory

ATMEL Corporation
ATMEL Corporation

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