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AT49SV802AT 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 AT49SV802AT은 전자 산업 및 응용 분야에서
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부품번호 AT49SV802AT 기능
기능 8-megabit 1.8-volt Only Flash Memory
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AT49SV802AT 데이터시트, 핀배열, 회로
Features
Sinwgwlew.VDoalttaaSgheeeRt4eUa.dc/oWmrite Operation: 1.65V to 1.95V
Access Time – 90 ns
Sector Erase Architecture
– Fifteen 32K Word (64K Bytes) Sectors with Individual Write Lockout
– Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout
Fast Byte/Word Program Time – 12 µs
Fast Sector Erase Time – 300 ms
Suspend/Resume Feature for Erase and Program
– Supports Reading and Programming from Any Sector by Suspending Erase
of a Different Sector
– Supports Reading Any Byte/Word in the Non-suspending Sectors by Suspending
Programming of Any Other Byte/Word
Low-power Operation
– 12 mA Active
– 13 µA Standby
Data Polling, Toggle Bit, Ready/Busy for End of Program Detection
RESET Input for Device Initialization
Sector Lockdown Support
TSOP and CBGA Package Options
Top or Bottom Boot Block Configuration Available
128-bit Protection Register
Minimum 100,000 Erase Cycles
Common Flash Interface (CFI)
Green (Pb/Halide-free) Packaging Option
1. Description
The AT49SV802A(T) is a 1.8-volt 8-megabit Flash memory organized as 524,288
words of 16 bits each or 1,048,576 bytes of 8 bits each. The x16 data appears on
I/O0 - I/O15; the x8 data appears on I/O0 - I/O7. The memory is divided into 23 sec-
tors for erase operations. The AT49SV802A(T) is offered in a 48-lead TSOP and a
48-ball CBGA package. The device has CE and OE control signals to avoid any bus
contention. This device can be read or reprogrammed using a single power supply,
making it ideally suited for in-system programming.
The device powers on in the read mode. Command sequences are used to place the
device in other operation modes such as program and erase. The device has the
capability to protect the data in any sector (see “Sector Lockdown” on page 7).
To increase the flexibility of the device, it contains an Erase Suspend and Program
Suspend feature. This feature will put the erase or program on hold for any amount of
time and let the user read data from or program data to any of the remaining sectors
within the memory. The end of a program or an erase cycle is detected by the
READY/BUSY pin, Data Polling or by the toggle bit.
8-megabit
(512K x 16/
1M x 8)
1.8-volt Only
Flash Memory
AT49SV802A
AT49SV802AT
Preliminary
3522C–FLASH–3/05




AT49SV802AT pdf, 반도체, 판매, 대치품
3. Block Diagram
www.DataSheet4U.com
I/O0 - I/O15/A-1
OUTPUT
BUFFER
INPUT
BUFFER
A0 - A18
INPUT
BUFFER
ADDRESS
LATCH
Y-DECODER
X-DECODER
IDENTIFIER
REGISTER
STATUS
REGISTER
DATA
COMPARATOR
Y-GATING
MAIN
MEMORY
COMMAND
REGISTER
WRITE STATE
MACHINE
PROGRAM/ERASE
VOLTAGE SWITCH
CE
WE
OE
RESET
BYTE
RDY/BUSY
VCC
GND
4. Device Operation
4.1 Read
The AT49SV802A(T) is accessed like an EPROM. When CE and OE are low and WE is high,
the data stored at the memory location determined by the address pins are asserted on the out-
puts. The outputs are put in the high impedance state whenever CE or OE is high. This dual-line
control gives designers flexibility in preventing bus contention.
4.2 Command Sequences
When the device is first powered on, it will be reset to the read or standby mode, depending
upon the state of the control line inputs. In order to perform other device functions, a series of
command sequences are entered into the device. The command sequences are shown in the
“Command Definition Table” on page 13 (I/O8 - I/O15 are don’t care inputs for the command
codes). The command sequences are written by applying a low pulse on the WE or CE input
with CE or WE low (respectively) and OE high. The address is latched on the falling edge of CE
4 AT49SV802A(T) [Preliminary]
3522C–FLASH–3/05

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AT49SV802AT 전자부품, 판매, 대치품
AT49SV802A(T) [Preliminary]
4.6.3 Erase/Program Status Bit
www.DataSheet4U.com The device offers a status bit on I/O5, which indicates whether the program or erase operation
has exceeded a specified internal pulse count limit. If the status bit is a “1”, the device is unable
to verify that an erase or a byte/word program operation has been successfully performed. If a
program (Sector Erase) command is issued to a protected sector, the protected sector will not
be programmed (erased). The device will go to a status read mode and the I/O5 status bit will be
set high, indicating the program (erase) operation did not complete as requested. Once the
erase/program status bit has been set to a “1”, the system must write the Product ID Exit com-
mand to return to the read mode. The erase/program status bit is a “0” while the erase or
program operation is still in progress. Please see “Status Bit Table” on page 12 for more details.
4.7 Sector Lockdown
Each sector has a programming lockdown feature. This feature prevents programming of data in
the designated sectors once the feature has been enabled. These sectors can contain secure
code that is used to bring up the system. Enabling the lockdown feature will allow the boot code
to stay in the device while data in the rest of the device is updated. This feature does not have to
be activated; any sector’s usage as a write-protected region is optional to the user.
At power-up or reset, all sectors are unlocked. To activate the lockdown for a specific sector, the
six-bus cycle Sector Lockdown command must be issued. Once a sector has been locked down,
the contents of the sector is read-only and cannot be erased or programmed.
4.7.1
4.7.2
Sector Lockdown Detection
A software method is available to determine if programming of a sector is locked down. When
the device is in the software product identification mode (see “Software Product Identification
Entry/Exit” sections on page 24), a read from address location 00002H within a sector will show
if programming the sector is locked down. If the data on I/O0 is low, the sector can be pro-
grammed; if the data on I/O0 is high, the program lockdown feature has been enabled and the
sector cannot be programmed. The software product identification exit code should be used to
return to standard operation.
Sector Lockdown Override
The only way to unlock a sector that is locked down is through reset or power-up cycles. After
power-up or reset, the content of a sector that is locked down can be erased and reprogrammed.
4.8 Erase Suspend/Erase Resume
The Erase Suspend command allows the system to interrupt a sector or chip erase operation
and then program or read data from a different sector within the memory. After the Erase Sus-
pend command is given, the device requires a maximum time of 15 µs to suspend the erase
operation. After the erase operation has been suspended, the system can then read data or pro-
gram data to any other sector within the device. An address is not required during the Erase
Suspend command. During a sector erase suspend, another sector cannot be erased. To
resume the sector erase operation, the system must write the Erase Resume command. The
Erase Resume command is a one-bus cycle command. The device also supports an erase sus-
pend during a complete chip erase. While the chip erase is suspended, the user can read from
any sector within the memory that is protected. The command sequence for a chip erase sus-
pend and a sector erase suspend are the same.
3522C–FLASH–3/05
7

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관련 데이터시트

부품번호상세설명 및 기능제조사
AT49SV802A

8-megabit 1.8-volt Only Flash Memory

ATMEL Corporation
ATMEL Corporation
AT49SV802AT

8-megabit 1.8-volt Only Flash Memory

ATMEL Corporation
ATMEL Corporation

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