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PDF AT68166FT Data sheet ( Hoja de datos )
| Número de pieza | AT68166FT | |
| Descripción | Rad Hard 16 MegaBit 3.3V 5V Tolerant SRAM Mult | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• 16 wMwbwit.DSaRtaASMheMet4uUlt.icComhip Module
• Allows 32-, 16- or 8-bit access configuration
• Operating Voltage: 3.3V + 0.3V, 5V Tolerant
• Access Time:
– 25 ns, 20 ns
– 18 ns (preliminary information)
• Very Low Power Consumption
– Active: 595 mW per byte (Max) @ 20 ns(1), 415mW per byte (Max) @ 50ns(2)
– Standby: 15 mW (Typ)
• Military Temperature Range: -55 to +125°C
• TTL-Compatible Inputs and Outputs
• Asynchronous
• Die manufactured on Atmel 0.25 µm Radiation Hardened Process
• No Single Event Latch Up below LET Threshold of 80 MeV/mg/cm2
• Tested up to a Total Dose of 300 krads (Si) according to MIL-STD-883 Method 1019
• ESD Better than 2000V
• Quality Grades:
– QML-Q or V with SMD 5962-06229
– ESCC
• 950 Mils Wide MQFP 68 Package
• Mass : 8.5 grams
Notes: 1. For AT68166FT-20 only. 540mW for AT68166FT-25.
2. For AT68166FT-20 only. 450mW for AT68166FT-25.
Description
The AT68166FT is a 16Mbit SRAM packaged in a hermetic Multi Chip Module (MCM)
for space applications.
The AT68166FT MCM incorporates four 4Mbit AT60142FT SRAM dice. It can be orga-
nized as either one bank of 512Kx8, two banks of 512Kx16 or four banks of 512Kx8. It
combines rad-hard capabilities, a latch-up threshold of 80MeV.cm²/mg, a Multiple Bit
Upset immunity and a total dose tolerance of 300Krads, with a fast access time.
The MCM packaging technology allows a reduction of the PCB area by 50% with a
weight savings of 75% compared to four 4Mbit packages.
Thanks to the small size of the 4Mbit SRAM die, Atmel has been able to accommo-
date the assembly of the four dice on one side of the package which facilitates the
power dissipation.
The compatibility with other products allows designers to easily migrate to the Atmel
AT68166FT memory.
The AT68166FT is powered at 3.3V and is 5V tolerant.
The AT68166FT is processed according to the test methods of the latest revision of
the MIL-PRF-38535 or the ESCC 9000.
Rad Hard
16 MegaBit 3.3V
5V Tolerant
SRAM Multi-
Chip Module
AT68166FT
7531G–AERO–07/07
1 page  
Pin Description
www.DataSheet4U.com Table 2. Pin Names
Name
A0 - A18
I/O0 - I/O31
CS0 - CS3
WE0 - WE3
OE
VCC
GND(1)
Note: 1. The package lid is connected to GND
Description
Address Inputs
Data Input/Output
Chip Select
Write Enable
Output Enable
Power Supply
Ground
Table 3. Truth Table(1)
CSx WEx
OE Inputs/Outputs
HXX
Z
LHL
Data Out
LLX
Data In
L HH
Z
Note: 1. L=low, H=high, X= H or L, Z=high impedance.
AT68166FT
Mode
Standby
Read
Write
Output Disable
7531G–AERO–07/07
5
5 Page 
Figure 7. Write Cycle 1. WE Controlled, OE High During Write
www.DataSheet4U.com
ADDRESS
CSx
WEx EE
OE
I/Os
Figure 8. Write Cycle 2. WE Controlled, OE Low
ADDRESS
CSx
WEx E
E
I/Os
Figure 9. Write Cycle 3. CS Controlled
ADDRESS
CSx
AT68166FT
WEx E
I/Os
The internal write time of the memory is defined by the overlap of CS Low and WE LOW. Both signals must
be activated to initiate a write and either signal can terminate a write by going in active mode. The data
input setup and hold timing should be referenced to the active edge of the signal that terminates the write.
Data out is high impedance if OE= VIH.
7531G–AERO–07/07
11
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet AT68166FT.PDF ] | |
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